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TPS536C9T Dual-channel (N + M ≤ 12 phase) D-CAP+™, Step-down, Multiphase Controllers with TLVR support, PMBus and VR14 SVID Interfaces
SLUSFF0
September 2023
TPS536C9T
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TPS536C9T Dual-channel (N + M ≤ 12 phase) D-CAP+™, Step-down, Multiphase Controllers with TLVR support, PMBus and VR14 SVID Interfaces
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device and Documentation Support
5.1
Documentation Support
5.2
Receiving Notification of Documentation Updates
5.3
Support Resources
5.4
Trademarks
5.5
Electrostatic Discharge Caution
5.6
Glossary
6
Mechanical, Packaging, and Orderable Information
6.1
Package Option Addendum
6.2
Packaging Information
6.3
Tape and Reel Information
7
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
RSL|48
MPQF193B
Thermal pad, mechanical data (Package|Pins)
RSL|48
QFND155O
Orderable Information
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Full reading width
Full reading width
Comfortable reading width
Expanded reading width
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Data Sheet
TPS536C9T
Dual-
channel
(N + M ≤
12
phase) D-CAP+™, Step-down,
Multiphase Controllers with TLVR support, PMBus and VR14 SVID Interfaces
1
Features
Input voltage range: 4.5 V to 17 V
Output voltage range: 0.25 V to 5.5 V
Dual output supporting N+M phase configurations (N+M ≤
12
, M ≤
6
)
Native trans-inductor voltage regulator (TLVR) topology support, with L
C
open and short protection
Fully compatible with TI smart power stages
Supports voltage- and current-source Imon power stages, with internal 1 kΩ resistor
Support for traditional (legacy mode) and limp mode power stage fault identification
Supports dual side power delivery with 12"+ trace length
Intel®
VR14 SVID compliant with PSYS support
Backward compatible to VR13.HC/VR13.0 SVID
Automatic NVM fault status logging
Enhanced D-CAP+ control to provider superior transient performance with excellent dynamic current sharing
Dynamic phase shedding with programmable thresholds for optimizing efficiency at light and heavy loads
Configurable with non-volatile memory (NVM) for low external component count
Individual per-phase IMON calibration, with multi-slope gain calibration to increase system accuracy
Diode braking with programmable timeout for reduced transient overshoot
Programmable per-phase valley current limit (OCL)
PMBus™
v1.3.1 system interface for telemetry of voltage, current, power, temperature, and fault conditions
Programmable loop compensation through PMBus
6.00 mm × 6.00 mm
,
48
-pin, QFN package
2
Applications
Data center & enterprise computing
rack server
Hardware accelerator
Network interface card (NIC)
ASIC and
high performance client