All Single Cell Li or Dual Cell Battery Operated Products as MP-3 Player, PDAs, and Other Portable Equipment
The TPS6103x devices provide a power supply solution for products powered by either a one-cell Li-Ion or Li-polymer, or a two to three-cell alkaline, NiCd or NiMH battery. The converter generates a stable output voltage that is either adjusted by an external resistor divider or fixed internally on the chip. It provides high efficient power conversion and is capable of delivering output currents up to 1 A at 5 V at a supply voltage down to 1.8 V. The implemented boost converter is based on a fixed frequency, pulse-width- modulation (PWM) controller using a synchronous rectifier to obtain maximum efficiency. At low load currents the converter enters Power Save mode to maintain a high efficiency over a wide load current range. The Power Save mode can be disabled, forcing the converter to operate at a fixed switching frequency. It can also operate synchronized to an external clock signal that is applied to the SYNC pin. The maximum peak current in the boost switch is limited to a value of 4500 mA.
The converter can be disabled to minimize battery drain. During shutdown, the load is completely disconnected from the battery. A low-EMI mode is implemented to reduce ringing and, in effect, lower radiated electromagnetic energy when the converter enters the discontinuous conduction mode.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS61030 | TSSOP (16) | 5.00 mm × 4.40 mm |
TPS61031 | ||
TPS61032 | ||
TPS61030 | QFN (16) | 4.00 mm x 4.00 mm |
TPS61031 | ||
TPS61032 |
Changes from F Revision (October 2014) to G Revision
Changes from E Revision (January 2012) to F Revision
Changes from D Revision (April 2004) to E Revision
TA | OUTPUT VOLTAGE DC/DC |
PACKAGE | PART NUMBER(2) |
---|---|---|---|
-40°C to 85°C | Adjustable | 16-Pin TSSOP PowerPAD™ | TPS61030 |
3.3 V | TPS61031 | ||
5 V | TPS61032 | ||
Adjustable | 16-Pin QFN | TPS61030 | |
3.3 V | TPS61031 | ||
5 V | TPS61032 |
PIN | I/O | DESCRIPTION | ||
---|---|---|---|---|
NAME | NO. | |||
PWP | RSA | |||
EN | 9 | 11 | I | Enable input. (1/VBAT enabled, 0/GND disabled) |
FB | 12 | 14 | I | Voltage feedback of adjustable versions |
GND | 11 | 13 | I/O | Control/logic ground |
LBI | 7 | 9 | I | Low battery comparator input (comparator enabled with EN) |
LBO | 10 | 12 | O | Low battery comparator output (open drain) |
NC | 16 | 2 | Not connected | |
PGND | 3, 4, 5 | 5, 6, 7 | I/O | Power ground |
PowerPAD™ | Must be soldered to achieve appropriate power dissipation. Should be connected to PGND. | |||
SYNC | 8 | 10 | I | Enable/disable power save mode (1/VBAT disabled, 0/GND enabled, clock signal for synchronization) |
SW | 1, 2 | 3, 4 | I | Boost and rectifying switch input |
VBAT | 6 | 8 | I | Supply voltage |
VOUT | 13, 14, 15 | 1, 15, 16 | O | DC/DC output |
MIN | MAX | UNIT | ||
---|---|---|---|---|
VI | Input voltage on LBI | –0.3 | 3.6 | V |
Input voltage on SW, VOUT, LBO, VBAT, SYNC, EN, FB | –0.3 | 7 | V | |
TJ | Maximum junction temperature | –40 | 150 | °C |
Tstg | Storage temperature range | –65 | 150 |
MIN | MAX | UNIT | |||
---|---|---|---|---|---|
V(ESD) | Electrostatic discharge | Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins(1) | –2000 | 2000 | V |
Charged device model (CDM), per JEDEC specification JESD22-C101, all pins(2) | –1000 | 1000 |
MIN | NOM | MAX | UNIT | ||
---|---|---|---|---|---|
VI | Supply voltage at VBAT | 1.8 | 5.5 | V | |
TA | Operating ambient temperature range | -40 | 85 | °C | |
TJ | Operating virtual junction temperature range | -40 | 125 | °C |
THERMAL METRIC(1) | TPS6103x | UNIT | ||
---|---|---|---|---|
PWP | RSA | |||
16 PINS | 16 PINS | |||
RθJA | Junction-to-ambient thermal resistance | 46.9 | 35.5 | °C/W |
RθJC(top) | Junction-to-case (top) thermal resistance | 25.8 | 36.7 | |
RθJB | Junction-to-board thermal resistance | 19.4 | 12.9 | |
ψJT | Junction-to-top characterization parameter | 0.8 | 0.5 | |
ψJB | Junction-to-board characterization parameter | 19.3 | 12.9 | |
RθJC(bot) | Junction-to-case (bottom) thermal resistance | 2.2 | 3.8 |
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
---|---|---|---|---|---|---|---|
DC/DC STAGE | |||||||
VI | Input voltage range | 1.8 | 5.5 | V | |||
VO | TPS61030 output voltage range | 1.8 | 5.5 | V | |||
VFB | TPS61030 feedback voltage | 490 | 500 | 510 | mV | ||
f | Oscillator frequency | 500 | 600 | 700 | kHz | ||
Frequency range for synchronization | 500 | 700 | kHz | ||||
Switch current limit | VOUT= 5 V | 3600 | 4000 | 4500 | mA | ||
Start-up current limit | 0.4 x ISW | mA | |||||
SWN switch on resistance | VOUT= 5 V | 55 | mΩ | ||||
SWP switch on resistance | VOUT= 5 V | 55 | mΩ | ||||
Total accuracy | -3% | 3% | |||||
Line regulation | 0.6% | ||||||
Load regulation | 0.6% | ||||||
Quiescent current | VBAT | IO = 0 mA, VEN = VBAT = 1.8 V, VOUT =5 V |
10 | 25 | µA | ||
VOUT | IO = 0 mA, VEN = VBAT = 1.8 V, VOUT = 5 V |
10 | 20 | µA | |||
Shutdown current | VEN= 0 V, VBAT = 2.4 V | 0.1 | 1 | µA | |||
CONTROL STAGE | |||||||
VUVLO | Under voltage lockout threshold | VLBI voltage decreasing | 1.5 | V | |||
VIL | LBI voltage threshold | VLBI voltage decreasing | 490 | 500 | 510 | mV | |
LBI input hysteresis | 10 | mV | |||||
LBI input current | EN = VBAT or GND | 0.01 | 0.1 | µA | |||
LBO output low voltage | VO = 3.3 V, IOI = 100 µA | 0.04 | 0.4 | V | |||
LBO output low current | 100 | µA | |||||
LBO output leakage current | VLBO= 7 V | 0.01 | 0.1 | µA | |||
VIL | EN, SYNC input low voltage | 0.2 × VBAT | V | ||||
VIH | EN, SYNC input high voltage | 0.8 × VBAT | V | ||||
EN, SYNC input current | Clamped on GND or VBAT | 0.01 | 0.1 | µA | |||
Overtemperature protection | 140 | °C | |||||
Overtemperature hysteresis | 20 | °C |
DC/DC CONVERTER | FIGURE | |
---|---|---|
Maximum output current | vs Input voltage | Figure 1, Figure 2 |
Efficiency | vs Output current (TPS61030) (VO = 2.5 V, VI = 1.8 V, VSYNC = 0 V) | Figure 3 |
vs Output current (TPS61031) (VO = 3.3 V, VI = 1.8 V, 2.4 V, VSYNC = 0 V) | Figure 4 | |
vs Output current (TPS61032) (VO = 5.0 V, VI = 2.4 V, 3.3 V, VSYNC = 0 V) | Figure 5 | |
vs Input voltage (TPS61031) (IO = 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) | Figure 6 | |
vs Input voltage (TPS61032) (IO = 10 mA, 100 mA, 1000 mA, VSYNC = 0 V) | Figure 7 | |
Output voltage | vs Output current (TPS61031) (VI = 2.4 V) | Figure 8 |
vs Output current (TPS61032) (VI = 3.3 V) | Figure 9 | |
No-load supply current into VBAT | vs Input voltage (TPS61032) | Figure 10 |
No-load supply current into VOUT | vs Input voltage (TPS61032) | Figure 11 |
Minimum Load Resistance at Startup | vs Input voltage (TPS61032) | Figure 12 |
VO = 2.5 V | VI = 1.8 V |
VO = 5 V |
VBAT = 3.3 V |
VO = 3.3 V |
VBAT = 2.4 V |