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  • TPS65218 Power Management for ARM® Cortex™-A8/A9 SOCs and FPGA

    • SLDS206E November   2014  – February 2021 TPS65218

      PRODUCTION DATA  

  • CONTENTS
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  • TPS65218 Power Management for ARM® Cortex™-A8/A9 SOCs and FPGA
  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1. 3.1 Simplified Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Wake-Up and Power-Up and Power-Down Sequencing
        1. 7.3.1.1  Power-Up Sequencing
        2. 7.3.1.2  Power-Down Sequencing
        3. 7.3.1.3  Strobe 1 and Strobe 2
        4. 7.3.1.4  Supply Voltage Supervisor and Power-Good (PGOOD)
        5. 7.3.1.5  Backup Supply Power-Good (PGOOD_BU)
        6. 7.3.1.6  Internal LDO (INT_LDO)
        7. 7.3.1.7  Current Limited Load Switches
          1. 7.3.1.7.1 Load Switch 1 (LS1)
          2. 7.3.1.7.2 Load Switch 2 (LS2)
          3. 7.3.1.7.3 Load Switch 3 (LS3)
        8. 7.3.1.8  LDO1
        9. 7.3.1.9  Coin Cell Battery Voltage Acquisition
        10. 7.3.1.10 UVLO
        11. 7.3.1.11 Power-Fail Comparator
        12. 7.3.1.12 Battery-Backup Supply Power-Path
        13. 7.3.1.13 DCDC3 and DCDC4 Power-Up Default Selection
        14. 7.3.1.14 I/O Configuration
          1. 7.3.1.14.1 Configuring GPO2 as Open-Drain Output
          2. 7.3.1.14.2 Using GPIO3 as Reset Signal to DCDC1 and DCDC2
        15. 7.3.1.15 Push Button Input (PB)
          1. 7.3.1.15.1 Signaling PB-Low Event on the nWAKEUP Pin
          2. 7.3.1.15.2 Push Button Reset
        16. 7.3.1.16 AC_DET Input (AC_DET)
        17. 7.3.1.17 Interrupt Pin (INT)
        18. 7.3.1.18 I2C Bus Operation
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
      2. 7.4.2 OFF
      3. 7.4.3 ACTIVE
      4. 7.4.4 SUSPEND
      5. 7.4.5 RESET
    5. 7.5 Register Maps
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Applications Without Backup Battery
      2. 8.1.2 Applications Without Battery Backup Supplies
    2. 8.2 Typical Application
      1. 8.2.1 Detailed Design Procedure
        1. 8.2.1.1 Output Filter Design
        2. 8.2.1.2 Inductor Selection for Buck Converters
        3. 8.2.1.3 Output Capacitor Selection
      2. 8.2.2 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information
  13. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • RSL|48
    • MPQF193B
  • PHP|48
    • MPQF051B
Thermal pad, mechanical data (Package|Pins)
  • RSL|48
    • QFND155O
  • PHP|48
    • PPTD319A
Orderable Information
  • slds206e_oa
  • slds206e_pm
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DATA SHEET

TPS65218 Power Management for ARM® Cortex™-A8/A9 SOCs and FPGA

1 Features

  • Three Adjustable Step-Down Converters With Integrated Switching FETs (DCDC1, DCDC2, and DCDC3):
    • DCDC1: 1.1-V Default, up to 1.8 A
    • DCDC2: 1.1-V Default, up to 1.8 A
    • DCDC3: 1.2-V Default, up to 1.8 A
    • VIN Range From 2.7 V to 5.5 V
    • Adjustable Output Voltage Range 0.85 V to 1.675 V (DCDC1 and DCDC2)
    • Adjustable Output Voltage Range 0.9 V to 3.4 V (DCDC3)
    • Power Save Mode at Light Load Current
    • 100% Duty Cycle for Lowest Dropout
    • Active Output-Discharge When Disabled
  • One Adjustable Buck-Boost Converter With Integrated Switching FETs (DCDC4):
    • DCDC4: 3.3-V Default, up to 1.6 A
    • VIN Range from 2.7 V to 5.5 V
    • Adjustable Output Voltage Range from 1.175 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Two Low-Quiescent Current, High Efficiency Step-Down Converters for Battery Backup Domain (DCDC5, DCDC6)
    • DCDC5: 1-V Output
    • DCDC6: 1.8-V Output
    • VIN Range from 2.2 V to 5.5 V
    • Supplied From System Power or Coin-Cell Backup Battery
  • Adjustable General-Purpose LDO (LDO1)
    • LDO1: 1.8-V Default up to 400 mA
    • VIN Range from 1.8 V to 5.5 V
    • Adjustable Output Voltage Range from 0.9 V to 3.4 V
    • Active Output-Discharge When Disabled
  • Low-Voltage Load Switch (LS1) With 350-mA Current Limit
    • VIN Range From 1.2 V to 3.6 V
    • 110-mΩ (Max) Switch Impedance at 1.35 V
  • 5-V Load Switch (LS2) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 4 V to 5.5 V
    • 500-mΩ (Max) Switch Impedance at 5 V
  • High-Voltage Load Switch (LS3) With 100-mA or 500-mA Selectable Current Limit
    • VIN Range From 1.8 V to 10 V
    • 500-mΩ (Max) Switch Impedance
  • Supervisor With Built-in Supervisor Function Monitors
    • DCDC1, DCDC2 ±4% Tolerance
    • DCDC3, DCDC4 ±5% Tolerance
    • LDO1 ±5% Tolerance
  • Protection, Diagnostics, and Control:
    • Undervoltage Lockout (UVLO)
    • Always-on Push-Button Monitor
    • Overtemperature Warning and Shutdown
    • Separate Power-Good Output for Backup and Main Supplies
    • I2C Interface (Address 0x24) (See Timing Requirements for I2C Operation at 400 kHz)

2 Applications

  • Human-Machine Interface (HMI)
  • Industrial Automation
  • Electronic Point of Sale (ePOS)
  • Test and Measurement
  • Personal Navigation

3 Description

The TPS65218 is a single chip power management IC, specifically designed to support both portable (Li-Ion battery) and non-portable (5-V adapter) applications.The device is characterized across a –40°C to +105°C temperature range, making it suitable for a wide range of industrial applications.

Device Information(1)
PART NUMBER PACKAGE BODY SIZE (NOM)
TPS65218 VQFN (48) 6.00 mm × 6.00 mm
TPS65218 HTQFP (48) 7.00 mm × 7.00 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.

 
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