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  • TPS65219 Integrated Power Management IC for ARM Cortex—A53 Processors and FPGAs

    • SLVSGA0B May   2022  – June 2024 TPS65219

      PRODUCTION DATA  

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  • TPS65219 Integrated Power Management IC for ARM Cortex—A53 Processors and FPGAs
  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  System Control Thresholds
    6. 6.6  BUCK1 Converter
    7. 6.7  BUCK2, BUCK3 Converter
    8. 6.8  General Purpose LDOs (LDO1, LDO2)
    9. 6.9  General Purpose LDOs (LDO3, LDO4)
    10. 6.10 GPIOs and multi-function pins (EN/PB/VSENSE, nRSTOUT, nINT, GPO1, GPO2, GPIO, MODE/RESET, MODE/STBY, VSEL_SD/VSEL_DDR)
    11. 6.11 Voltage and Temperature Monitors
    12. 6.12 I2C Interface
    13. 6.13 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  Power-Up Sequencing
      2. 7.3.2  Power-Down Sequencing
      3. 7.3.3  Push Button and Enable Input (EN/PB/VSENSE)
      4. 7.3.4  Reset to SoC (nRSTOUT)
      5. 7.3.5  Buck Converters (Buck1, Buck2, and Buck3)
      6. 7.3.6  Linear Regulators (LDO1 through LDO4)
      7. 7.3.7  Interrupt Pin (nINT)
      8. 7.3.8  PWM/PFM and Low Power Modes (MODE/STBY)
      9. 7.3.9  PWM/PFM and Reset (MODE/RESET)
      10. 7.3.10 Voltage Select pin (VSEL_SD/VSEL_DDR)
      11. 7.3.11 General Purpose Inputs or Outputs (GPO1, GPO2, and GPIO)
      12. 7.3.12 I2C-Compatible Interface
        1. 7.3.12.1 Data Validity
        2. 7.3.12.2 Start and Stop Conditions
        3. 7.3.12.3 Transferring Data
    4. 7.4 Device Functional Modes
      1. 7.4.1 Modes of Operation
        1. 7.4.1.1 OFF State
        2. 7.4.1.2 INITIALIZE State
        3. 7.4.1.3 ACTIVE State
        4. 7.4.1.4 STBY State
        5. 7.4.1.5 Fault Handling
    5. 7.5 Multi-PMIC Operation
    6. 7.6 User Registers
    7. 7.7 Device Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Typical Application Example
      2. 8.2.2 Design Requirements
      3. 8.2.3 Detailed Design Procedure
        1. 8.2.3.1 Buck1, Buck2, Buck3 Design Procedure
        2. 8.2.3.2 LDO1, LDO2 Design Procedure
        3. 8.2.3.3 LDO3, LDO4 Design Procedure
        4. 8.2.3.4 VSYS, VDD1P8
        5. 8.2.3.5 Digital Signals Design Procedure
      4. 8.2.4 Application Curves
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information
  13. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • RSM|32
    • MPQF195B
  • RHB|32
    • MPQF130D
Thermal pad, mechanical data (Package|Pins)
  • RSM|32
    • QFND112H
  • RHB|32
    • QFND676
Orderable Information
  • slvsga0b_oa
  • slvsga0b_pm
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Data Sheet

TPS65219 Integrated Power Management IC for ARM Cortex—A53 Processors and FPGAs

1 Features

  • 3 buck converters at up to 2.3 MHz switching frequency.
    • 1× VIN: 2.5V – 5.5V; IOUT: 3.5A; VOUT 0.6V – 3.4V
    • 2× VIN: 2.5 V – 5.5 V; IOUT: 2A; VOUT 0.6V – 3.4V
  • 4 linear regulators:
    • 2x VIN: 1.5V – 5.5V; IOUT: 400mA; VOUT: 0.6V – 3.4V (configurable as load switch and bypass-mode, supporting SD-card)
    • 2x VIN: 2.2V – 5.5V; IOUT: 300mA; VOUT: 1.2V – 3.3V (configurable as load switch)
  • Dynamic voltage scaling on all three buck converters
  • Low IQ/PFM, PWM-mode (quasi-fixed frequency)
  • Programmable power sequencing and default voltages
  • I2C interface, supporting standard, fast-mode and fast-mode+
  • Designed to support systems with 14+ rails (2× TPS65219 devices in multi-PMIC configuration)
  • 2 GPOs, 1 GPIO, and 3 multi-function-pins
  • EEPROM programmability

2 Applications

  • Low power industrial MPUs and MCUs such as AM62x, AM64x and AM243x
  • HMI
  • PLC
  • Industrial PC
  • Building security
  • HVAC
  • Video surveillance
  • Data concentrators
  • Smart meter
  • Protection relays
  • Patient monitoring and diagnostics
  • Imaging

 
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