TPS748A 1.5-A, Low-Dropout Linear Regulator With Programmable Soft-Start
1 Features
- VOUT range: 0.8 V to 3.6 V
- Ultra-low VIN range: 0.8 V to 6.0 V
- VBIAS range: 2.7 V to 6.0 V
- Low dropout: 75 mV typical at 1.5 A, VBIAS = 5 V
- Power-good (PG) output allows supply monitoring or provides a sequencing signal for other supplies
- 0.85% accuracy over line, load, and temperature
- Programmable soft-start provides linear voltage start-up
- VBIAS permits low VIN operation with good transient response
- Stable with any output capacitor ≥ 10 μF
- Available in small, 3-mm × 3-mm × 1-mm VSON-10 packages
3 Description
The TPS748A low-dropout (LDO) linear regulator provides an easy-to-use robust power management solution for a wide variety of applications. User-programmable soft-start minimizes stress on the input power source by reducing capacitive inrush current on start-up. The soft-start is monotonic and designed for powering many different types of processors and application-specific integrated circuits (ASICs). The enable input and power-good output allow easy sequencing with external regulators. This complete flexibility enables a solution to be configured that meets the sequencing requirements of field-programmable gate arrays (FPGAs), digital signal processors (DSPs), and other applications with special start-up requirements.
A precision reference and error amplifier deliver 0.85% accuracy over load, line, temperature, and process. The device is stable with any type of capacitor greater than or equal to 10 μF, and is fully specified for TJ = –40°C to +125°C. The TPS748A is offered in a small, 3-mm × 3-mm, VSON-10 package, yielding a highly compact, total solution size.
| PART NUMBER | PACKAGE | BODY SIZE (NOM) |
|---|---|---|
| TPS748A | DRC (VSON, 10) | 3.00 mm × 3.00 mm |
Typical Application Circuit
(Adjustable)
Output Voltage Noise Density
vs Frequency4 Revision History
| DATE | REVISION | NOTES |
|---|---|---|
| December 2022 | * | Initial Release |
5 Pin Configuration and Functions
Figure 5-1 DRC
Package,10-Pin VSON With Thermal
Pad(Top View)| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | VSON | ||
| BIAS | 4 | I | Bias input voltage for error amplifier, reference, and internal control circuits. Use a 1-µF or larger input capacitor for optimal performance. If IN is connected to BIAS, a 4.7-µF or larger capacitor must be used. |
| EN | 5 | I | Enable pin. Driving this pin high enables the regulator. Driving this pin low puts the regulator into shutdown mode. This pin must not be left unconnected. |
| FB | 8 | I | Feedback pin. This pin is the feedback connection to the center tap of an external resistor divider network that sets the output voltage. This pin must not be left floating. |
| GND | 6 | — | Ground |
| IN | 1, 2 | I | Input to the device. Use a 1-µF or larger input capacitor for optimal performance. |
| NC | N/A | — | No connection. This pin can be left floating or connected to GND to allow better thermal contact to the top-side plane. |
| OUT | 9, 10 | O | Regulated output voltage. A small capacitor (total typical capacitance ≥ 2.2 μF, ceramic) is needed from this pin to ground to assure stability. |
| PG | 3 | O | Power-good pin. An open-drain, active-high output that indicates the status of VOUT. When VOUT exceeds the PG trip threshold, the PG pin goes into a high-impedance state. When VOUT is below this threshold the pin is driven to a low-impedance state. Connect a pullup resistor (10 kΩ to 1 MΩ) from this pin to a supply of up to 6.0 V. The supply can be higher than the input voltage. Alternatively, the PG pin can be left unconnected if output monitoring is not necessary. |
| SS | 7 | — | Soft-start pin. A capacitor connected on this pin to ground sets the start-up time. If this pin is left unconnected, the regulator output soft-start ramp time is typically 200 μs. |
| Thermal pad | — | Must be soldered to the ground plane for increased thermal performance. Internally connected to ground. | |
