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TPS7A20 300mA, Ultra-Low-Noise, Low-IQ, High PSRR LDO
SBVS338H
March 2020 – July 2024
TPS7A20
PRODUCTION DATA
CONTENTS
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TPS7A20 300mA, Ultra-Low-Noise, Low-IQ, High PSRR LDO
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Electrical Characteristics
5.6
Switching Characteristics
5.7
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Feature Description
6.3.1
Low Output Noise
6.3.2
Smart Enable
6.3.3
Dropout Voltage
6.3.4
Foldback Current Limit
6.3.5
Undervoltage Lockout (UVLO)
6.3.6
Thermal Shutdown
6.3.7
Active Discharge (P Version Only)
6.4
Device Functional Modes
6.4.1
Device Functional Mode Comparison
6.4.2
Normal Operation
6.4.3
Dropout Operation
6.4.4
Disabled
7
Application and Implementation
7.1
Application Information
7.1.1
Recommended Capacitor Types
7.1.2
Input and Output Capacitor Requirements
7.1.3
Load Transient Response
7.1.4
Undervoltage Lockout (UVLO) Operation
7.1.5
Power Dissipation (PD)
7.1.5.1
Estimating Junction Temperature
7.1.5.2
Recommended Area for Continuous Operation
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.3
Application Curves
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Examples
8
Device and Documentation Support
8.1
Device Support
8.1.1
Device Nomenclature
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
10.1
Mechanical Data
IMPORTANT NOTICE
Package Options
Mechanical Data (Package|Pins)
DBV|5
MPDS018T
YCK|4
MXBG452A
YCJ|4
DQN|4
MPSS021E
Thermal pad, mechanical data (Package|Pins)
DQN|4
QFND355C
Orderable Information
sbvs338h_oa
sbvs338h_pm
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TPS7A20 300mA, Ultra-Low-Noise, Low-I
Q
, High PSRR LDO
