SLVSEQ3B
September 2018 – May 2022
TVS1801
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings - JEDEC
7.3
ESD Ratings - IEC
7.4
Recommended Operating Conditions
7.5
Thermal Information
7.6
Electrical Characteristics
7.7
Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.4
Device Functional Modes
8.4.1
Protection Specifications
8.4.2
Reliability Testing
8.4.3
Zero Derating
8.4.4
Bidirectional Operation
8.4.5
Transient Performance
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documenation
12.2
Receiving Notification of Documentation Updates
12.3
Support Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DRB|8
MPDS118K
Thermal pad, mechanical data (Package|Pins)
DRB|8
QFND058N
Orderable Information
slvseq3b_oa
slvseq3b_pm
1
Features
Protection against 1 kV, 42-Ω IEC 61000-4-5 surge test for industrial signal lines
Bidirectional polarity enables protection against bipolar signaling or miswiring conditions
Clamping voltage of 27.4 V at 30 A of 8/20 µs surge current
Standoff voltage: ±18 V
Small 3 mm × 3 mm SON footprint
Survives over 5,000 repetitive strikes of 30-A 8/20 µs surge current at 125°C
Robust surge protection
IEC61000-4-5 (8/20 µs): 30 A
IEC61643-321 (10/1000 µs): 4.5 A
Low leakage current
0.4 nA typical at 27°C
280 nA maximum at 85°C
Low capacitance: 65 pF
Integrated level 4 IEC 61000-4-2 ESD protection