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  • TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection

    • SCES639E January   2007  – March 2023 TXB0101

      PRODUCTION DATA  

  • CONTENTS
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  • TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection
  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specification
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Timing Requirements, VCCA = 1.2 V
    7. 6.7  Timing Requirements, VCCA = 1.5 V ± 0.1 V
    8. 6.8  Timing Requirements, VCCA = 1.8 V ± 0.15 V
    9. 6.9  Timing Requirements, VCCA = 2.5 V ± 0.2 V
    10. 6.10 Timing Requirements, VCCA = 3.3 V ± 0.3 V
    11. 6.11 Switching Characteristics, VCCA = 1.2 V
    12. 6.12 Switching Characteristics, VCCA = 1.5 V ± 0.1 V
    13. 6.13 Switching Characteristics, VCCA = 1.8 V ± 0.15 V
    14. 6.14 Switching Characteristics, VCCA = 2.5 V ± 0.2 V
    15. 6.15 Switching Characteristics, VCCA = 3.3 V ± 0.3 V
    16. 6.16 Operating Characteristics
    17. 6.17 Typical Characteristics
      1.      Parameter Measurement Information
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Architecture
      2. 7.3.2 Power Up
      3. 7.3.3 Enable and Disable
      4. 7.3.4 Pullup or Pulldown Resistors on I/O Lines
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
        1. 8.2.1.1 Input Driver Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Layout Example
  9. 9 Device and Documentation Support
    1. 9.1 Receiving Notification of Documentation Updates
    2. 9.2 Support Resources
    3. 9.3 Trademarks
    4. 9.4 Electrostatic Discharge Caution
    5. 9.5 Glossary
  10. 10Mechanical, Packaging, and Orderable Information
  11. IMPORTANT NOTICE

Package Options

Mechanical Data (Package|Pins)
  • YZP|6
    • MXBG347
  • DCK|6
    • MPDS114F
  • DRL|6
    • MPDS159I
  • DBV|6
    • MPDS026Q
Thermal pad, mechanical data (Package|Pins)
Orderable Information
  • sces639e_oa
  • sces639e_pm
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    • Full reading width
    • Comfortable reading width
    • Expanded reading width
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DATA SHEET

TXB0101 1-Bit Bidirectional Level-Shifting and Voltage Translator With Auto Direction-Sensing and ±15-kV ESD Protection

1 Features

  • Available in the Texas Instruments NanoFree™ package
  • 1.2 V to 3.6 V on A port and
    1.65 V to 5.5 V on B port (VCCA ≤ VCCB)
  • VCC isolation feature – if either VCC input is at GND, all outputs are in the high-impedance state
  • OE input circuit referenced to VCCA
  • Low power consumption, 5 μA maximum ICC
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100 mA Per JESD 78, class II
  • ESD protection Exceeds JESD 22
    • A port
      • 2000 V Human body model (A114-B)
      • 250 V Machine model (A115-A)
      • 1500 V Charged-device model (C101)
    • B port
      • 15 kV Human body model (A114-B)
      • 250 V Machine model (A115-A)
      • 1500 V Charged-device model (C101)

2 Applications

  • Handsets
  • Smartphones
  • Tablets
  • Desktop PCs

3 Description

This 1-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA should not exceed VCCB.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver.

NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package.

Package Information
PART NUMBERPACKAGE(1)BODY SIZE (NOM)
TXB0101SOT-23 (DBV) (6)2.90 mm × 1.60 mm
SC70 (DCK) (6)2.00 mm × 1.25 mm
SOT (DRL) (6)1.60 mm × 1.20 mm
DSBGA (YZP) (6)0.90 mm × 1.40 mm
(1) For all available packages, see the orderable addendum at the end of the data sheet.
GUID-AAA03E39-B21C-444F-9571-2D013EB11B64-low.gif Typical Operating Circuit

4 Revision History

Changes from Revision D (March 2017) to Revision E (March 2023)

  • Changed the Body Size for YZP package from: 1.1 mm × 1.20 mm to: 0.9 mm × 1.40 mm in the Packaging Information table Go
  • Changed Note 1 in the Absolute Maximum Ratings Go

Changes from Revision C (June 2015) to Revision D (March 2017)

  • Added Absolute maximum junction temperature, TJ in Absolute Maximum Ratings Go
  • Added TXB0101 Port A and Port B specifications in ESD Ratings tableGo
  • Added Receiving Notification of Documentation Updates sectionGo

Changes from Revision B (May 2012) to Revision C (June 2015)

  • Added Pin Configuration and Functions section, ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
  • Removed Ordering Information table Go

Changes from Revision A (November 2008) to Revision B (March 2012)

  • Added notes to pin out graphics.Go

 
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