SLUSDM7A
April 2020 – May 2020
UCC21736-Q1
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Pin Configuration
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety Limiting Values
6.9
Electrical Characteristics
6.10
Switching Characteristics
6.11
Insulation Characteristics Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay
7.1.1
Regular Turn-OFF
7.2
Input Deglitch Filter
7.3
Active Miller Clamp
7.3.1
External Active Miller Clamp
7.4
Under Voltage Lockout (UVLO)
7.4.1
VCC UVLO
7.4.2
VDD UVLO
7.4.3
VEE UVLO
7.5
OC (Over Current) Protection
7.5.1
OC Protection with Soft Turn-OFF
7.6
ASC Protection
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Power Supply
8.3.2
Driver Stage
8.3.3
VCC, VDD and VEE Undervoltage Lockout (UVLO)
8.3.4
Active Pulldown
8.3.5
Short Circuit Clamping
8.3.6
External Active Miller Clamp
8.3.7
Overcurrent and Short Circuit Protection
8.3.8
Fault (FLT, Reset and Enable (RST/EN)
8.3.9
ASC Protection and APWM Monitor
8.4
Device Functional Modes
9
Applications and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Input filters for IN+, IN- and RST/EN
9.2.2.2
PWM Interlock of IN+ and IN-
9.2.2.3
FLT, RDY and RST/EN Pin Circuitry
9.2.2.4
RST/EN Pin Control
9.2.2.5
Turn on and turn off gate resistors
9.2.2.6
External Active Miller Clamp
9.2.2.7
Overcurrent and Short Circuit Protection
9.2.2.7.1
Protection Based on Power Modules with Integrated SenseFET
9.2.2.7.2
Protection Based on Desaturation Circuit
9.2.2.7.3
Protection Based on Shunt Resistor in Power Loop
9.2.2.8
Higher Output Current Using an External Current Buffer
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resource
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
DW|16
MSOI003I
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slusdm7a_oa
1
Features
5.7-kV
RMS
single channel isolated gate driver
AEC-Q100 qualified for automotive applications
SiC MOSFETs and IGBTs up to 2121 V
pk
33-V maximum output drive voltage (VDD-VEE)
±10-A drive strength and split output
150-V/ns minimum CMTI
270-ns response time fast overcurrent protection
External active miller clamp
900-mA soft turn-off when fault happens
ASC input on isolated side to turn on power switch during system fault
Alarm
FLT
on over current and reset from
RST
/EN
Fast enable/disable response on
RST
/EN
Reject <40-ns noise transient and pulse on input pins
12V VDD UVLO and -3V VEE UVLO with power good on RDY
Inputs/outputs with over/under-shoot transient voltage Immunity up to 5 V
130-ns (maximum) propagation delay and 30-ns (maximum) pulse/part skew
SOIC-16 DW package with creepage and clearance distance > 8 mm
Operating junction temperature –40°C to 150°C