Refer to the PDF data sheet for device specific package drawings
The UCC27517A-Q1 single-channel high-speed low-side gate-driver device effectively drives MOSFET and IGBT power switches. With a design that inherently minimizes shoot-through current, the UCC27517A-Q1 sources and sinks high peak-current pulses into capacitive loads offering rail-to-rail drive capability and extremely small propagation delay typically 13 ns.
The UCC27517A-Q1 device handles –5 V at input.
The UCC27517A-Q1 provides 4-A source and 4-A sink (symmetrical drive) peak-drive current capability at VDD = 12 V.
The UCC27517A-Q1 operates over a wide VDD range of 4.5 V to 18 V and wide temperature range of –40°C to 140°C. Internal Undervoltage Lockout (UVLO) circuitry on VDD pin holds the output low outside VDD operating range. The ability to operate at low voltage levels such as below 5 V, along with best-in-class switching characteristics, is especially suited for driving emerging wide band-gap power-switching devices such as GaN power-semiconductor devices.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
UCC27517A-Q1 | SOT-23 (5) | 2.90 mm × 1.60 mm |
Changes from A Revision (September 2013) to B Revision
Changes from * Revision (August 2013) to A Revision
UCC27517A-Q1 features a dual-input design which offers flexibility of implementing both inverting (IN– pin) and non-inverting (IN+ pin) configurations with the same device. Either the IN+ or IN– pin are used to control the state of the driver output. The unused input pin is used for the enable and disable functional. For protection purpose, internal pullup and pulldown resistors on the input pins ensure that outputs are held low when input pins are in floating condition. Hence the unused input pin is not left floating and must be properly biased to ensure that driver output is in enabled for normal operation.
The input-pin threshold of the UCC27517A-Q1 device is based on TTL and CMOS compatible low-voltage logic which is fixed and independent of the VDD supply voltage. Wide hysteresis between the high and low thresholds offers excellent noise immunity.
The UCC2751x family of gate-driver products (Table 1) represent Texas Instruments’ latest generation of single-channel, low-side high-speed gate driver devices featuring high-source and sink current capability, industry best-in-class switching characteristics, and a host of other features (Table 3) all of which combine to ensure efficient, robust, and reliable operation in high-frequency switching power circuits.
PART NUMBER(1) | PACKAGE | PEAK CURRENT (SOURCE, SINK) | INPUT THRESHOLD LOGIC |
---|---|---|---|
UCC27511DBV UCC27511ADBVQ1 |
SOT-23, 6 pin | 4-A, 8-A (Asymmetrical Drive) |
CMOS and TTL-Compatible (low voltage, independent of VDD bias voltage) |
UCC27512DRS | 3-mm × 3-mm WSON, 6 pin | ||
UCC27516DRS | 3-mm × 3-mm WSON, 6 pin | 4-A, 4-A (Symmetrical Drive) |
|
UCC27517DBV UCC27517ADBVQ1 UCC27517ADBV |
SOT-23, 5 pin | ||
UCC27518DBV UCC27518ADBVQ1 |
SOT-23, 5 pin | CMOS (follows VDD bias voltage) |
|
UCC27519DBV UCC27519ADBVQ1 |
SOT-23, 5 pin |
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | VDD | I | Bias supply input |
2 | GND | – | Ground. All signals reference to this pin |
3 | IN+ | I | Non-inverting input. Apply PWM control signal to this pin when driver is desired to be operated in non-inverting configuration. When the driver is used in inverting configuration, connect IN+ to VDD in order to enable output, OUT held LOW if IN+ is unbiased or floating |
4 | IN– | I | Inverting input. Apply PWM control signal to this pin when driver is desired to be operated in inverting configuration. When the driver is used in non-inverting configuration, connect IN– to GND in order to enable output, OUT held LOW if IN– is unbiased or floating |
5 | OUT | O | Sourcing/Sinking current output of driver |