SLUSB36C June   2012  – January 2015 UCD8220-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 CLK Input Time-Domain Digital Pulse Train
      2. 7.3.2 Current Sensing and Protection
      3. 7.3.3 Handshaking
      4. 7.3.4 Driver Output
      5. 7.3.5 Source and Sink Capabilities During Miller Plateau
      6. 7.3.6 Drive Current and Power Requirements
      7. 7.3.7 Clearing the Current-Limit Flag (CLF)
    4. 7.4 Device Functional Modes
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Selecting the ISET Resistor for Voltage Mode Control
        2. 8.2.2.2 Selecting the ISET Resistor for Voltage Mode Control with Voltage Feed Forward
        3. 8.2.2.3 Selecting the ISET Resistor for Peak Current Mode Control with Internal Slope Compensation
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • For Digitally Managed Power Supplies Using μCs or the TMS320 ™ DSP Family
  • Voltage or Peak Current Mode Control with Cycle-by-Cycle Current Limiting
  • Clock Input from Digital Controller to Set Operating Frequency and Max Duty Cycle
  • Analog PWM Comparator
  • 2-MHz Switching Frequency
  • 110-V Input Startup Circuit and Thermal Shutdown (UCD8620)
  • Internal Programmable Slope Compensation
  • 3.3-V, 10-mA Linear Regulator
  • DSP/μC Compatible Inputs
  • Dual ±4-A TrueDrive™ Integrated Circuit High Current Drivers
  • 10-ns Typical Rise and Fall Times with 2.2-nF
  • 25-ns Input-to-Output Propagation Delay
  • 25-ns Current Sense-to-Output Propagation Delay
  • Programmable Current-Limit Threshold
  • Digital Output Current-Limit Flag
  • 4.5-V to 15.5-V Supply Voltage Range

2 Applications

  • Automotive HEV/EV and Powertrain
  • Digitally Managed Switch Mode Power Supplies
  • Push-Pull, Half-Bridge, or Full-Bridge Converters
  • Battery Chargers

3 Description

The UCD8220-Q1 analog pulse-width modulator (PWM) device is used in digitally managed power supplies using a microcontroller or the TMS320 DSP family.

The UCD8220-Q1 device is a double-ended PWM controller configured with push-pull drive logic.

Systems using the UCD8220-Q1 device close the PWM feedback loop with traditional analog methods, but the UCD8220-Q1 controller includes circuitry to interpret a time-domain digital pulse train. The pulse train contains the operating frequency and maximum duty cycle limit which are used to control the power supply operation. The device circuitry eases implementation of a converter with high level control features without the added complexity or possible PWM resolution limitations of closing the control loop in the discrete time domain.

The UCD8220-Q1 device can be configured for either peak current mode or voltage mode control. The device provides a programmable current-limit function and a digital output current-limit flag which can be monitored by the host controller to set the current limit operation. For fast switching speeds, the output stage uses the TrueDrive output circuit architecture, which delivers rated current of ±4-A into the gate of a MOSFET. Finally the device also includes a 3.3-V, 10-mA linear regulator to provide power to the digital controller or act as a reference in the system.

The UCD8220-Q1 controller is compatible with the standard 3.3-V I/O ports of UCD9K digital power controllers, DSPs, microcontrollers, or ASICs and is offered in the PowerPAD™ integrated circuit package HTSSOP.

Device Information(1)

PART NUMBER PACKAGE BODY SIZE (NOM)
UCD8220-Q1 HTSSOP (16) 5.00 mm × 4.40 mm
  1. For all available packages, see the orderable addendum at the end of the datasheet.

UCD8220-Q1 Typical Simplified Push-Pull Converter Application Schematic

d8220_ppcir_lus652.gif

4 Revision History

Changes from B Revision (July 2014) to C Revision

  • Added the following sections to the data sheet: Device Functional Modes, Application Information, Design Requirements, Application Curves, Power Supply Recommendations, and Layout ExampleGo
  • Changed the Handling Ratings table to ESD ratings and moved the storage temperature into the Absolute Maximum Ratings table Go

Changes from A Revision (June 2012) to B Revision

  • Updated the data sheet format to meet the new TI data sheet standards Go
  • Deleted VIN (input to internal start-up circuitry) from the Pin Functions table Go
  • Added the Clearing the Current-Limit Flag (CLF) sectionGo

Changes from * Revision (June 2012) to A Revision

  • Device went from preview to productionGo