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Precision labs 시리즈: 모터 기술

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      발표자

      Welcome to Texas Instruments Precision Labs. My name is Omar Naamani. I'm an Applications Engineer in TI's Brushless DC Motor Drivers group. This video explores how to determine whether a gate driver or an integrated driver best suits your motor drive systems needs.

      Brushed, brushless, and stepper motor drivers share many of the same tradeoffs when selecting which gate drive topology to use. For simplicity, this presentation will discuss the design considerations at a high level, such that the information is useful regardless of which motor type you're using. In a DC motor driver, pairs of Field Effect Transistors or FETs in a half-bridge configuration are driven by control logic.

      For example, a typical brushless DC motor driver will have three half-bridges to drive each phase of the motor. This component of the topology is known as the power stage or final drive stage. The primary difference between these topologies is how the power stage is implemented in a systems design. Gate drivers use an external FET topology, meaning that the power stage FETs are not included within the device.

      Designers are required to select appropriate FETs and implement the final drive circuit independently of the driver. Integrated drivers include the power stage inside their package alongside the gate drive circuit, charge pumps, interface, as well as device-specific features like current sensing. In an integrated driver, power stage FETs can be on their own semi-conductor chips in what is known as a multichip module or on the same die in a monolithic topology. Monolithic integrated drivers are most commonly used for low motor current applications.

      Gate drivers offer flexibility. At its core, a gate driver's purpose is to switch external FETs to control current flow through a motor. Selecting the FETs and motor are design choices that are less constrained when using this topology. Since the driver can be isolated well from its power stage, high-voltage and high-current applications are more attainable using these parts. As a rule of thumb, if a system will have an output of over 70 watts, it is suggested to use a gate driver

      In this case driver block diagram, we can see how the internal gate drive circuit connects to three half-bridges. Each of the six FETs may be switched by applying gate-to-source voltage in accordance to control inputs. Some gate drivers, like the one shown, feature smart gate drive architecture. This allows for designers to adjust parameters, such as the gate voltage slew rate without board modifications. Smart gate drive further increases the tenability of these parts during prototyping.

      Operating at high power while balancing efficiency can be achieved by choosing FETs with low drain-to-source resistance. External FET packages tend to increase in size as the RDS(on) parameter decreases, which is a tradeoff in board space. The main benefit of lowering this resistance is a reduction in power loss as motor current will induce a smaller voltage drop between drain and source. The maximum current rating of a FET is closely related to its RDS(on) since this resistance increases with temperature, which, in turn, causes increased dissipation. Gate drivers often encapsulate charge pumps, temperature monitoring, and current sense amplifiers for detecting overcurrent conditions.

      The most important parameter when using a gate driver is the gate drive current. This determines what power stage loads can be driven by the part and how quickly they can be turned on and off. It is also worth noting that the power consumption of a gate driver is negligible when compared to the external FETs, especially in high-power motor applications. The major drawback of using a gate driver is what it does not encapsulate. Design times increase due to the added complexity of developing a schematic and layout for the power stage.

      Integrated drivers, on the other hand, offer simplicity. The built-in power stage reduces the development time required for schematic and layout. This also minimizes the bill of materials, which, in most cases, reduces the board space a motor drive solution will occupy. The TI portfolio offers a wide range of integrated drivers with varied peak current capabilities. Despite this topology being geared towards use and lower-current applications, some TI parts have peak current ratings that exceed 10 amps.

      In this integrated driver block diagram, we can see the encapsulation of three half-bridges. The outputs of the predriver are no longer accessible as they are inside a gate driver, and the device connects directly to the motor. Integrated drivers are more of an all-in-one solution in terms of their operation. The package contains a power stage with preselecting transistor characteristics.

      These are optimized for a peak current range that puts a constraint on the motors that can be driven. Additionally, during production, the full system, including its control interface, built-in protection, internal supplies, and motor driving outputs are tested. This assures that a device performs its function before being implemented in a system, often simplifying debug during the prototyping phase.

      Optimal thermal performance is achieved at low motor currents, and temperature monitoring is extended to the power stage. On the other hand, while small solution size is usually an attractive characteristic, thermal performance becomes difficult to manage as power and current requirements increase. In general, if your motor current is greater than 10 amps, an external FET driver would be better for spreading out power dissipation.

      Like in the power stage of an external FET design, as RDS(on) decreases, the integrated drivers package size increases. This creates a directly proportionate relationship between peak current and driver footprint. Integrated driver solutions in these scenarios approach similar board space requirements to higher-current gate driver designs.

      Maximum junction temperature ratings of integrated FET devices can only be maintained by selecting a proper RDS(on) value. Maximum power dissipation of a typical motor driver is determined using the peak motor current and the drain-to-source resistance of the high and low side FETs. These are not modifiable parameters in this topology. So the peak current is selected such that the package size and thermal paths inside the device prevent overheating during normal operation.

      To investigate how each driver type utilizes board space, and example external FET gate driver is shown alongside an MCM-integrated driver. Both layouts include typical passive components within the white rectangle. The external FETs were selected, such that the half-bridge has only 23 milliohms of combined resistance. These FETs have a maximum junction temperature of 175 C and are capable of delivering 9.1 amps of continuous current while keeping below 1.9 watts of power dissipation.

      The integrated driver, on the other hand, has a combined RDS(on) of about 80 milliohms and can only drive about 4 amps of continuous motor current. The gate and integrated driver take up 220 and 247 square millimeters of board space, respectively, which suggests that when these implementations occupy similar board space, it is possible for the driver to have a higher current capability. This is true because of the availability of lower RDS(on) external FETs. In this plot, you can see how across single FET packages, the combined high and low side RDS(on) exhibits and inversely proportionate trend with respect to board size.

      We can compare the previous plot to the same relationship for integrated drivers. Not only is there a decreased range of RDS(on) values, the border area at lower values appropriate sizes comparable to full gate drive implementations. The package size for these devices has to increase dramatically for lower RDS(on). This can be attributed mostly to increased thermal dissipation needs and increased semiconductor die size.

      The most significant source of heat in these motor applications is the power stage FETs. Heat dissipation paths vary by topology. In an external gate driver, the separate packages have thermal paths from each of their ground pads into the top copper layer of the printed circuit board. When using a monolithic integrated driver, there is only one thermal pad shared across both the power stage and the gate driver since they are on a single die. The MCM topology is similar but also has a thermal path for heat to transfer between the individual semiconductor chips within the device.

      The images below are the same two boards analyzed earlier in this presentation. However, the gate driver's external FET selection was changed to one with a combined high and low RDS(on) of about 80 milliohms for equivalence with the integrated driver. Both of these devices are operating with 3-amp current loads. This illustrates that the external FET solution had an only slightly higher maximum temperature when using similar FETs to the ones inside of the integrated driver. Although, since these parts occupy similar board space, it is important to reiterate that the gate driver has the option of reducing RDS(on) to improve thermal performance.

      In summary, although there are many tradeoffs to consider when designing a motor drive system with these parts, at its core, the gate driver offers flexibility where the integrated driver offers simplicity. To find more motor driver technical resources and search products, visited ti.com/motordrivers. Thank you for watching.

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