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비디오 시리즈

Precision labs 시리즈: 위상 잠금 루프 기본 사항

이 비디오 시리즈에서는 VCO, 정수 및 분수 N 주파수 디바이더, 위상 감지기 및 전하 펌프와 같은 PLL(위상 잠금 루프)의 기본 구성 요소를 설명합니다. 루프 필터 설계 및 이론의 자세한 예와 함께 PLL 과도 응답에 대한 개별 샘플링 및 다중 루프의 영향을 설명합니다.

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      발표자

      [MUSIC PLAYING]

      Hello, my name is Dean Banerjee, and I'd like to welcome you to TI Precision Labs PLL Building Blocks, Part 1. Somewhere inside practically every electronic circuit or system you'll find phase lock loops of various types and configurations. In this training module, and the part 2 companion video, we'll take a first look under the hood and discuss some of the basic core blocks inside of the phase lock loop, or PLL.

      Here we can see the basic building blocks that make up a PLL. In this module, you'll learn more about the VCO, output frequency divider, and N divider, including both integer and fractional types.

      The voltage controlled oscillator, or VCO, is one of the main building blocks of the PLL. It produces frequencies within a limited frequency band, which is typically higher than that of the reference oscillator frequency. The VCO frequency is tunable, and is controlled by changing the input tuning voltage. This frequency can vary considerably over temperature, supply voltage, or semiconductor process, and is much less stable than that of the reference oscillator.

      The VCO contains a resonant, or tank circuit, that can be thought of as an electronic spring. When the voltage across the capacitor is maximum, the current in the inductor is minimum, and vice versa. Assuming no parasitic resistances, the circuit would go on forever. But wouldn't that be nice? The VCO resonant circuit can be compared to the pendulum of a cuckoo clock. The length of the pendulum determines the period, which enables the cuckoo clock to keep steady time.

      In order to keep the pendulum going, a stimulus is needed to be applied in the right way to maintain the oscillations without distorting the period of the signal. In an analogous way, a stimulus is needed for the LC circuit as well. Circuit losses in the oscillator, such as the parasitic resistance in the inductor, can cause the circuit to eventually stop oscillating. A measure of the tank circuit inductor is the quality factor, or Q. Just as a pendulum, it is necessary to provide some stimulus to keep the circuit going.

      Here we have a typical cope bit style oscillator. When the inductor current is maximum, the voltage across the capacitors is minimum. Some of this current goes into transistors and is amplified, and it increases, the voltage across C1, thus increasing the voltage at the top in the inductor. In this way, the oscillation is maintained. If C1 is too large, the circuit might oscillate, but the active device will add excessive noise. If C1 is too small, then the circuit may not be strong enough to maintain the oscillation.

      To implement tuning of the VCO a variable capacitor varactor is commonly used. The varactor diode capacitance is typically in the Pico farad range, and decreases as more voltage is applied. As this is a variable capacitor, we want the resonance of the frequency to change, but do not want to tinker with the delicate feedback set up by capacitor C1 and C2. The capacitor C3 adds to the varactor capacitance. A larger value for a C3 improves phase noise but reduces the tuning range of the VCO.

      Resistor R5 isolates the tuning voltage from the loop filter. With integrating VCOs in silicon, their comes the question, where the resin elements come from? For the inductor there are multiple approaches. One is to integrate a spiral inductor in silicon using top metal layers. Another approach involves using bond wires in order to form the inductance. Newer techniques allow integration of higher Q resonators, such as a bulk acoustic wave resonator into the VCO.

      When VCOs are integrated in the silicon, capacitors are typically switched in and out using digital logic in order to increase the tuning range. The VCO tuning range can vary across bands, and is typically lower when more capacitance is switched in. Note that even though the capacitors are all switched in, there is a resistance on the switch which can affect the Q.

      Several different frequency bands can be formed by banks of switch capacitors or inductors. By breaking up the VCO tuning range into several different bands, the tuning range of the VCO can be increased without sacrificing phase noise. These bands jointly cover the whole frequency range, but there is no longer a one-to-one relationship between the tuning voltage and the frequency. It is therefore necessary to have frequency calibration, ensuring the correct band is selected when the VCO frequency is changed.

      Returning back to the PLL architecture, additional circuitry is necessary to control the tuning voltage of the VCO to steer it to the proper frequency, but why is feedback necessary? The reason is that even for a fixed tuning voltage, the VCO frequency would drift over temperature, supply voltage, and process. This is a reason to have the feedback control loop lock the VCO frequency to the reference.

      In order to generate this feedback loop, the reference oscillator frequency f osc, is divided down by the R counter to create the phase detector frequency, f PD. The VCO frequency, f VCO, is divided by the N counter to create the feedback single f sub N. If the VCO frequency range is much higher than the desired frequency, f OUT, the output divider can be used to bring it into range.

      Let's take a look at the feedback, or N divider. The N counter value is determined by dividing the VCO frequency by the phase detector frequency. Input to this counter can be high frequency, and prescalers are typically used inside this counter. For very high VCO frequencies, sometimes only a fixed prescaler, P, is used. P is typically a power of 2. The prescaler portion of the divider is running at the highest frequency and consumes most of the current, but the rest of the N counter has lower frequency of operation, and can therefore save overall current consumption.

      One disadvantage of using the prescaler is that the frequency resolution is worse by a factor of P. Some high frequency VCOs have a divide by 2 output that can be fed back to the PLL, which acts as a similar way as using a prescaler. Switchable dual modulus prescalers allow higher frequency division without sacrificing resolution.

      The way it works is the divider first starts by dividing the VCO frequency with the prescaler and the one pulse-swallow circuit. After every P plus 1 VCO cycles, both the A and B counters are decremented by one count. After A times P plus 1 cycles the A counter reaches zero the B counter has B minus A remaining counts, and the pulse-swallow circuitry is disabled. After the pulse-swallow circuitry is disabled it takes B minus A times P VCO cycles to run the B counter to zero.

      The total N count is therefore N equals P times B plus A. B bigger than equal to A is a consequence of this architecture. If this is not satisfied, then the device will reset prematurely and produce the wrong divide value. If the N divider is larger than the known value, which is the minimum continuous divide ratio, then this requirement of B bigger than equal to A is always met. This can be calculated as P times P minus 1 for the standard N divider, but other factors, such as fractional division circuitry, can increase this value.

      Now consider the fractional N divider. In this case, we want to generate a frequency of 900.2 megahertz using a 1 megahertz phase detector frequency. This fractional divide of 900 and 1/5 is needed. In order to do this, we modulate the N divider between values of 900 and 901. In this case we use the divide value of 900 four times, and the value of 901 once. The error between the actual and desired rising edges of the phase detector lead to fractional spurs, and they occur at multiples of 200 kilohertz in this case.

      Fractional spurs can be reduced by modulating the N divider between more than just two values. This is what is done in the case of higher-order delta sigma modulators. For the previous example, the fraction was 900.2, and the first-order modulator would modulate between values and 900 and 901. A second-order modulator could use values of 899, 900, 901, and 902. A third-order modulator could use values ranging from 897 to 904. The modulator does not always have to use all numbers available in its range. Fractional dividers can increase the minimally continuous N divider ratio, because all the values used, even though at modulated values, have to be valid.

      Here's an example of a fraction of 1/10 with a phase detector frequency of 10 megahertz. These plots assume an infinite lead bandwidth and no filtering. On the left we see spur and fractional noise shaping transfer function. The close in fractional noise and spurs are theoretically attenuated and pushed to higher frequencies. The frequency where this peaks is half the phase detector frequency, and this is well beyond where the loop bandwidth would be.

      If we look at the plot here on the right, we see that the first fractional spread at 1 megahertz is much lower using the third-order modulator than the first-order modulator. In fact, it's about 20 dB better. In the case that the fraction was smaller, like 1/100 or 1/1000, this theoretical benefit would be much more pronounced.

      This training module will be continued in PLO Building Blocks Part 2. To find more technical information and to search products, visit ti.com. Please be sure to try our four question short quiz after this to check your understanding.

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      Precision labs 시리즈: 위상 잠금 루프 기본 사항