Altium

Design Rule Verification Report

Date: 5/13/2022
Time: 12:22:14 PM
Elapsed Time: 00:00:05
Filename: C:\Users\a0798742\Documents\UCC28781-Q1\EVM Items -781Q\HVP053_B_Altium (05-13-2022)\HVP053B.PcbDoc
Warnings: 0
Rule Violations: 0
Waived Violations: 3

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=6mil) (not InComponentClass('FiducialMark')),(not InComponentClass('FiducialMark')) 0
Clearance Constraint (Gap=25mil) (InNetClass('HV')),(not OnMultiLayer) 0
Clearance Constraint (Gap=0mil) (((IsTrack Or IsArc) And Not InPoly) And IsFree and IsKeepOut),(((IsTrack Or IsArc) And Not InPoly) And IsFree and IsKeepOut) 0
Clearance Constraint (Gap=8mil) (InPolygon),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Width Constraint (Min=5mil) (Max=100mil) (Preferred=10mil) (All) 0
Routing Layers(All) 0
Routing Via (MinHoleWidth=7.874mil) (MaxHoleWidth=40mil) (PreferredHoleWidth=16mil) (MinWidth=26mil) (MaxWidth=65mil) (PreferedWidth=34mil) (All) 0
Routing Via (MinHoleWidth=7.874mil) (MaxHoleWidth=12.992mil) (PreferredHoleWidth=7.874mil) (MinWidth=19.685mil) (MaxWidth=23.622mil) (PreferedWidth=19.685mil) (IsVia and InAnyComponent) 0
Power Plane Connect Rule(Direct Connect )(Expansion=10mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=5.906mil) (IsVia and InAnyComponent) 0
Minimum Annular Ring (Minimum=5mil) (All) 0
Acute Angle Constraint (Minimum=5.000) (All) 0
Hole Size Constraint (Min=7.874mil) (Max=251mil) (All) 0
Pads and Vias to follow the Drill pairs settings 0
Hole To Hole Clearance (Gap=7.874mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0mil) (InComponentClass('Logo')),(InComponentClass('Logo')) 0
Minimum Solder Mask Sliver (Gap=1mil) (All),(All) 0
Silk To Solder Mask (Clearance=0.5mil) (IsPad and InAnycomponent),(All) 0
Silk To Solder Mask (Clearance=0mil) (All),(All) 0
Silk to Silk (Clearance=0mil) ((HasFootprint('Pb-Free_Overlay_Medium') OR HasFootprint('Pb-Free_Overlay_Small'))),((HasFootprint('Pb-Free_Overlay_Medium') OR HasFootprint('Pb-Free_Overlay_Small'))) 0
Silk to Silk (Clearance=0.5mil) (All),(All) 0
Net Antennae (Tolerance=0mil) (All) 0
Board Clearance Constraint (Gap=0mil) (OnCopper and Not InComponentClass('Logo') and not InComponentClass('FiducialMark') and not InRegion(1000,500,4000,800)) 0
Board Clearance Constraint (Gap=0mil) (OnCopper and InPoly) 0
Board Clearance Constraint (Gap=0mil) (OnCopper and InComponentClass('Mounting Holes')) 0
Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = 30mil ) (IsThruComponent),(IsSMTComponent) 0
Component Clearance Constraint ( Horizontal Gap = 8mil, Vertical Gap = 10mil ) (HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*')),(HasFootprint('0201*') or HasFootprint('0402*') or HasFootprint('0508') or HasFootprint('0603*') or HasFootprint('0612') or HasFootprint('0805*') or HasFootprint('0815*') or HasFootprint('0830*') or HasFootprint('1206*') or HasFootprint('1210*') or HasFootprint('1808*') or HasFootprint('1812*') or HasFootprint('1825*') or HasFootprint('2010*') or HasFootprint('2220*') or HasFootprint('2225*') or HasFootprint('2512*') or HasFootprint('2728*') or HasFootprint('3518*')) 0
Component Clearance Constraint ( Horizontal Gap = 8mil, Vertical Gap = 10mil ) (All),(All) 0
Component Clearance Constraint ( Horizontal Gap = 2mil, Vertical Gap = 30mil ) (IsThruComponent),(IsThruComponent) 0
Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = Infinite ) (InComponentClass('Mounting Holes')),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0mil, Vertical Gap = 0mil ) (InComponentClass('Header')),(InComponentClass('Shunt')) 0
Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = 10mil ) (InComponentClass('Mounting Holes')),(InComponentClass('FiducialMark')) 0
Component Clearance Constraint ( Horizontal Gap = 5mil, Vertical Gap = 10mil ) ((HasFootprint('NY PMS 440 0025 PH'))),((HasFootprint('Keystone_1902C'))) 0
Component Clearance Constraint ( Horizontal Gap = 5mil, Vertical Gap = 0mil ) (InComponentClass('Logo')),(All) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 0

Waived Violations Count
Net Antennae (Tolerance=0mil) (All) 1
Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = 30mil ) (IsThruComponent),(IsSMTComponent) 1
Component Clearance Constraint ( Horizontal Gap = 8mil, Vertical Gap = 10mil ) (All),(All) 1
Total 3

Rule Violations

Waived Violations

Net Antennae (Tolerance=0mil) (All)
Net Antennae: Via (990mil,1960mil) from Top Layer to Bottom Layer
Waived by Uli Goerke at 3/11/2022 3:06:13 PM
I placed this pad on the track as it is.
I can't get rid of the Antenna violation, even by allowing 200mil, so I'm waiving the error.

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Component Clearance Constraint ( Horizontal Gap = 10mil, Vertical Gap = 30mil ) (IsThruComponent),(IsSMTComponent)
Component Clearance Constraint: (Collision < 10mil) Between Small Component J5-TSW-103-07-G-S (750mil,1950mil) on Top Layer And SMT Small Component SH-J1-SNT-100-BK-T-H (750mil,2000mil) on Top Layer
Waived by Uli Goerke at 5/13/2022 11:53:05 AM
This "violation" occurs because the Shunt connector SH-J1 is intentionally placed on the connector pins of J5 where it will normally be located. Not a real violation.

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Component Clearance Constraint ( Horizontal Gap = 8mil, Vertical Gap = 10mil ) (All),(All)
Component Clearance Constraint: (Collision < 8mil) Between SMT Small Component C15-GRM21AR72E102KW01D (1225mil,2740mil) on Bottom Layer And SMT Small Component Logo14-CAUTION HOT SURFACE (1125mil,2630.015mil) on Bottom Layer
Waived by Uli Goerke at 3/11/2022 8:24:52 PM
This "violation" is the rectangular region of a triangular symbol is overlapped by a pad of a component. The actual silkscreen is well far enough away from the pad. Only the oversized region for the symbol is "too close".
So I'm waving this one.

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