Silk To Solder Mask (Clearance=10mil) (IsPad),(All) |
Silk To Solder Mask Clearance Constraint: (7.655mil < 10mil) Between Arc (1489.528mil,629.921mil) on Top Overlay And Pad GaN_SW2-1(1489.528mil,629.921mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.655mil]
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Silk To Solder Mask Clearance Constraint: (8.982mil < 10mil) Between Arc (1720mil,4300mil) on Top Overlay And Pad PGND-1(1720mil,4300mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [8.982mil]
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Silk To Solder Mask Clearance Constraint: (7.655mil < 10mil) Between Arc (2210mil,2365mil) on Top Overlay And Pad HVBUS-1(2210mil,2365mil) on Multi-Layer [Top Overlay] to [Top Solder] clearance [7.655mil]
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Silk To Solder Mask Clearance Constraint: (5.871mil < 10mil) Between Area Fill (2797.011mil,2775.038mil) (2817.011mil,2843.038mil) on Top Overlay And Pad D3-1(2834.693mil,2809mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.871mil]
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Silk To Solder Mask Clearance Constraint: (5.872mil < 10mil) Between Area Fill (2924.675mil,3021.064mil) (2944.675mil,3089.064mil) on Top Overlay And Pad D2-1(2906.992mil,3055.102mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.872mil]
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Silk To Solder Mask Clearance Constraint: (5.788mil < 10mil) Between Area Fill (2929.41mil,2846.276mil) (2949.41mil,2914.276mil) on Top Overlay And Pad D1-1(2911.811mil,2880.284mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.788mil]
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Silk To Solder Mask Clearance Constraint: (5.521mil < 10mil) Between Area Fill (4196.304mil,1368.328mil) (4216.304mil,1460.328mil) on Top Overlay And Pad D13-1(4172.772mil,1414.328mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.521mil]
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Silk To Solder Mask Clearance Constraint: (2.092mil < 10mil) Between Area Fill (4217.404mil,1828.093mil) (4237.088mil,1930.455mil) on Top Overlay And Pad R33-1(4196.61mil,1912.832mil) on Top Layer [Top Overlay] to [Top Solder] clearance [2.092mil]
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Silk To Solder Mask Clearance Constraint: (5.89mil < 10mil) Between Area Fill (4224.303mil,1357.324mil) (4244.303mil,1481.324mil) on Top Overlay And Pad D8-1(4289.563mil,1419.328mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.89mil]
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Silk To Solder Mask Clearance Constraint: (5.89mil < 10mil) Between Area Fill (5471.87mil,1922.328mil) (5491.87mil,2046.328mil) on Top Overlay And Pad D5-1(5426.61mil,1984.328mil) on Top Layer [Top Overlay] to [Top Solder] clearance [5.89mil]
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Silk To Solder Mask Clearance Constraint: (9.347mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7753.496mil,2952.784mil)(7776.496mil,2952.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.347mil]
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Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7757.126mil,3018.78mil)(7757.126mil,3089.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
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Silk To Solder Mask Clearance Constraint: (9.347mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7826.496mil,2952.784mil)(7849.496mil,2952.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.347mil]
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Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7835.866mil,3018.78mil)(7835.866mil,3089.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
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Silk To Solder Mask Clearance Constraint: (9.504mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7840.996mil,2964.835mil)(7840.996mil,2987.835mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.504mil]
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Silk To Solder Mask Clearance Constraint: (9.528mil < 10mil) Between Pad C105-1(7796.496mil,2987.284mil) on Top Layer And Track (7840.996mil,2964.835mil)(7881.996mil,2964.835mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.528mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C106-2(7861.496mil,3036.457mil) on Top Layer And Track (7840.996mil,3037.835mil)(7840.996mil,3060.835mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C106-2(7861.496mil,3036.457mil) on Top Layer And Track (7840.996mil,3060.835mil)(7881.996mil,3060.835mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C106-2(7861.496mil,3036.457mil) on Top Layer And Track (7881.996mil,3037.835mil)(7881.996mil,3060.835mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C107-2(7552.52mil,3157.284mil) on Top Layer And Track (7553.898mil,3136.784mil)(7576.898mil,3136.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C107-2(7552.52mil,3157.284mil) on Top Layer And Track (7553.898mil,3177.784mil)(7576.898mil,3177.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C107-2(7552.52mil,3157.284mil) on Top Layer And Track (7576.898mil,3136.784mil)(7576.898mil,3177.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad C111-2(7471.496mil,3992.284mil) on Top Layer And Text "R86" (7464.496mil,3981.3mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C111-2(7471.496mil,3992.284mil) on Top Layer And Track (7447.118mil,3971.784mil)(7447.118mil,4012.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C111-2(7471.496mil,3992.284mil) on Top Layer And Track (7447.118mil,3971.784mil)(7470.118mil,3971.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C111-2(7471.496mil,3992.284mil) on Top Layer And Track (7447.118mil,4012.784mil)(7470.118mil,4012.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (2.929mil < 10mil) Between Pad C113-2(993mil,903.921mil) on Bottom Layer And Text "C113" (1037.653mil,933.504mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [2.929mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C116-2(7234.094mil,3539.724mil) on Top Layer And Track (7213.594mil,3515.346mil)(7213.594mil,3538.346mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C116-2(7234.094mil,3539.724mil) on Top Layer And Track (7213.594mil,3515.346mil)(7254.594mil,3515.346mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C116-2(7234.094mil,3539.724mil) on Top Layer And Track (7254.594mil,3515.346mil)(7254.594mil,3538.346mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (4.925mil < 10mil) Between Pad C118-2(880mil,903.921mil) on Bottom Layer And Text "C118" (928.653mil,935.504mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.925mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C121-1(7821.496mil,1647.284mil) on Top Layer And Track (7800.996mil,1622.906mil)(7800.996mil,1645.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C121-1(7821.496mil,1647.284mil) on Top Layer And Track (7800.996mil,1622.906mil)(7841.996mil,1622.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C121-1(7821.496mil,1647.284mil) on Top Layer And Track (7841.996mil,1622.906mil)(7841.996mil,1645.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C122-1(7562.874mil,1797.284mil) on Top Layer And Track (7538.496mil,1776.784mil)(7538.496mil,1817.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C122-1(7562.874mil,1797.284mil) on Top Layer And Track (7538.496mil,1776.784mil)(7561.496mil,1776.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C122-1(7562.874mil,1797.284mil) on Top Layer And Track (7538.496mil,1817.784mil)(7561.496mil,1817.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C124-1(6661mil,4120.756mil) on Bottom Layer And Track (6640.5mil,4096.378mil)(6640.5mil,4119.378mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C124-1(6661mil,4120.756mil) on Bottom Layer And Track (6640.5mil,4096.378mil)(6681.5mil,4096.378mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C124-1(6661mil,4120.756mil) on Bottom Layer And Track (6681.5mil,4096.378mil)(6681.5mil,4119.378mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad C127-2(6348.189mil,3543.032mil) on Top Layer And Text "L7" (6372.968mil,3531.457mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C127-2(6348.189mil,3543.032mil) on Top Layer And Track (6327.689mil,3518.654mil)(6327.689mil,3541.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C127-2(6348.189mil,3543.032mil) on Top Layer And Track (6327.689mil,3518.654mil)(6368.689mil,3518.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C127-2(6348.189mil,3543.032mil) on Top Layer And Track (6368.689mil,3518.654mil)(6368.689mil,3541.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Text "C127" (6334.315mil,3494.012mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
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Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Text "R97" (6286.126mil,3493.598mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
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Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Track (6290mil,3420mil)(6290mil,3454mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
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Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Track (6290mil,3454mil)(6330mil,3454mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
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Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Track (6330mil,3454mil)(6370mil,3454mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
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Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C130-2(6330mil,3420mil) on Top Layer And Track (6370mil,3420mil)(6370mil,3454mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
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Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C131-2(6569.094mil,3377.283mil) on Top Layer And Track (6529.094mil,3343.284mil)(6529.094mil,3377.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
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Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C131-2(6569.094mil,3377.283mil) on Top Layer And Track (6529.094mil,3343.284mil)(6569.094mil,3343.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
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Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C131-2(6569.094mil,3377.283mil) on Top Layer And Track (6569.094mil,3343.284mil)(6609.094mil,3343.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
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Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C131-2(6569.094mil,3377.283mil) on Top Layer And Track (6609.094mil,3343.284mil)(6609.094mil,3377.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C134-2(6054.094mil,4074.528mil) on Top Layer And Track (6033.594mil,4075.905mil)(6033.594mil,4098.905mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C134-2(6054.094mil,4074.528mil) on Top Layer And Track (6033.594mil,4098.905mil)(6074.594mil,4098.905mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C134-2(6054.094mil,4074.528mil) on Top Layer And Track (6074.594mil,4075.905mil)(6074.594mil,4098.905mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C139-2(7310mil,3995.968mil) on Top Layer And Track (7289.5mil,3971.591mil)(7289.5mil,3994.591mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C139-2(7310mil,3995.968mil) on Top Layer And Track (7289.5mil,3971.591mil)(7330.5mil,3971.591mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C139-2(7310mil,3995.968mil) on Top Layer And Track (7330.5mil,3971.591mil)(7330.5mil,3994.591mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C142-1(6840.591mil,3472.284mil) on Top Layer And Track (6843.094mil,3445.017mil)(6869.077mil,3445.017mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
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Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C142-1(6840.591mil,3472.284mil) on Top Layer And Track (6843.094mil,3499.483mil)(6869.077mil,3499.483mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
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Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C142-1(6840.591mil,3472.284mil) on Top Layer And Track (6869.077mil,3445.017mil)(6869.077mil,3499.483mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
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Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C142-2(6777.598mil,3472.284mil) on Top Layer And Track (6749.112mil,3445.017mil)(6749.112mil,3499.483mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
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Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C142-2(6777.598mil,3472.284mil) on Top Layer And Track (6749.112mil,3445.017mil)(6775.094mil,3445.017mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
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Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C142-2(6777.598mil,3472.284mil) on Top Layer And Track (6749.112mil,3499.483mil)(6775.094mil,3499.483mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C144-1(6671.496mil,3405.905mil) on Top Layer And Track (6650.996mil,3407.284mil)(6650.996mil,3430.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C144-1(6671.496mil,3405.905mil) on Top Layer And Track (6650.996mil,3430.284mil)(6691.996mil,3430.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C144-1(6671.496mil,3405.905mil) on Top Layer And Track (6691.996mil,3407.284mil)(6691.996mil,3430.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C144-2(6671.496mil,3358.661mil) on Top Layer And Track (6650.996mil,3334.284mil)(6650.996mil,3357.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C144-2(6671.496mil,3358.661mil) on Top Layer And Track (6650.996mil,3334.284mil)(6691.996mil,3334.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C144-2(6671.496mil,3358.661mil) on Top Layer And Track (6691.996mil,3334.284mil)(6691.996mil,3357.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C145-1(2637.874mil,3327.284mil) on Top Layer And Track (2613.496mil,3306.784mil)(2613.496mil,3347.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C145-1(2637.874mil,3327.284mil) on Top Layer And Track (2613.496mil,3306.784mil)(2636.496mil,3306.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C145-1(2637.874mil,3327.284mil) on Top Layer And Track (2613.496mil,3347.784mil)(2636.496mil,3347.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C147-2(1979.685mil,3375.315mil) on Top Layer And Track (1959.185mil,3350.937mil)(1959.185mil,3373.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C147-2(1979.685mil,3375.315mil) on Top Layer And Track (1959.185mil,3350.937mil)(2000.185mil,3350.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C147-2(1979.685mil,3375.315mil) on Top Layer And Track (2000.185mil,3350.937mil)(2000.185mil,3373.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C163-2(8308.898mil,837.284mil) on Top Layer And Track (8206.535mil,797.913mil)(8277.402mil,797.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
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Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C163-2(8308.898mil,837.284mil) on Top Layer And Track (8206.535mil,876.654mil)(8277.402mil,876.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C18-1(8303.74mil,3757.284mil) on Top Layer And Track (8305.118mil,3736.784mil)(8328.118mil,3736.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C18-1(8303.74mil,3757.284mil) on Top Layer And Track (8305.118mil,3777.784mil)(8328.118mil,3777.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C18-1(8303.74mil,3757.284mil) on Top Layer And Track (8328.118mil,3736.784mil)(8328.118mil,3777.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C3-1(8235.551mil,3985.984mil) on Top Layer And Track (8207.065mil,3958.784mil)(8207.065mil,4013.25mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
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Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C3-1(8235.551mil,3985.984mil) on Top Layer And Track (8207.065mil,3958.784mil)(8233.047mil,3958.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
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Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C3-1(8235.551mil,3985.984mil) on Top Layer And Track (8207.065mil,4013.25mil)(8233.047mil,4013.25mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
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Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C32-1(2558.976mil,4032.284mil) on Top Layer And Track (2530.49mil,4005.084mil)(2530.49mil,4059.55mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C32-1(2558.976mil,4032.284mil) on Top Layer And Track (2530.49mil,4005.084mil)(2556.472mil,4005.084mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C32-1(2558.976mil,4032.284mil) on Top Layer And Track (2530.49mil,4059.55mil)(2556.472mil,4059.55mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C34-1(7589.252mil,4042.284mil) on Top Layer And Track (7564.874mil,4021.784mil)(7564.874mil,4062.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C34-1(7589.252mil,4042.284mil) on Top Layer And Track (7564.874mil,4021.784mil)(7587.874mil,4021.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C34-1(7589.252mil,4042.284mil) on Top Layer And Track (7564.874mil,4062.784mil)(7587.874mil,4062.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C39-1(7697.047mil,3352.284mil) on Top Layer And Track (7672.669mil,3331.784mil)(7672.669mil,3372.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C39-1(7697.047mil,3352.284mil) on Top Layer And Track (7672.669mil,3331.784mil)(7695.669mil,3331.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C39-1(7697.047mil,3352.284mil) on Top Layer And Track (7672.669mil,3372.784mil)(7695.669mil,3372.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C42-2(7761.496mil,4102.441mil) on Top Layer And Track (7740.996mil,4078.063mil)(7740.996mil,4101.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C42-2(7761.496mil,4102.441mil) on Top Layer And Track (7740.996mil,4078.063mil)(7781.996mil,4078.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C42-2(7761.496mil,4102.441mil) on Top Layer And Track (7781.996mil,4078.063mil)(7781.996mil,4101.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C43-1(2075.472mil,3708.662mil) on Bottom Layer And Track (2054.972mil,3684.284mil)(2054.972mil,3707.284mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C43-1(2075.472mil,3708.662mil) on Bottom Layer And Track (2054.972mil,3684.284mil)(2095.972mil,3684.284mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C43-1(2075.472mil,3708.662mil) on Bottom Layer And Track (2095.972mil,3684.284mil)(2095.972mil,3707.284mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C45-1(7559.094mil,3580.905mil) on Top Layer And Track (7538.594mil,3582.284mil)(7538.594mil,3605.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C45-1(7559.094mil,3580.905mil) on Top Layer And Track (7538.594mil,3605.284mil)(7579.594mil,3605.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C45-1(7559.094mil,3580.905mil) on Top Layer And Track (7579.594mil,3582.284mil)(7579.594mil,3605.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C45-2(7559.094mil,3533.661mil) on Top Layer And Track (7538.594mil,3509.284mil)(7538.594mil,3532.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C45-2(7559.094mil,3533.661mil) on Top Layer And Track (7538.594mil,3509.284mil)(7579.594mil,3509.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C45-2(7559.094mil,3533.661mil) on Top Layer And Track (7579.594mil,3509.284mil)(7579.594mil,3532.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C46-1(8175.039mil,2739.872mil) on Top Layer And Track (8206.535mil,2700.502mil)(8277.402mil,2700.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C46-1(8175.039mil,2739.872mil) on Top Layer And Track (8206.535mil,2779.242mil)(8277.402mil,2779.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C48-2(8308.898mil,652.284mil) on Top Layer And Track (8206.535mil,612.913mil)(8277.402mil,612.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C48-2(8308.898mil,652.284mil) on Top Layer And Track (8206.535mil,691.654mil)(8277.402mil,691.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C49-2(8308.898mil,747.284mil) on Top Layer And Track (8206.535mil,707.913mil)(8277.402mil,707.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C49-2(8308.898mil,747.284mil) on Top Layer And Track (8206.535mil,786.654mil)(8277.402mil,786.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C51-1(8175.039mil,2554.872mil) on Top Layer And Track (8206.535mil,2515.502mil)(8277.402mil,2515.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C51-1(8175.039mil,2554.872mil) on Top Layer And Track (8206.535mil,2594.242mil)(8277.402mil,2594.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C51-2(8308.898mil,2554.872mil) on Top Layer And Track (8206.535mil,2515.502mil)(8277.402mil,2515.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C51-2(8308.898mil,2554.872mil) on Top Layer And Track (8206.535mil,2594.242mil)(8277.402mil,2594.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C52-2(8308.898mil,2197.284mil) on Top Layer And Track (8206.535mil,2157.913mil)(8277.402mil,2157.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C52-2(8308.898mil,2197.284mil) on Top Layer And Track (8206.535mil,2236.654mil)(8277.402mil,2236.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C53-2(8308.898mil,2112.284mil) on Top Layer And Track (8206.535mil,2072.913mil)(8277.402mil,2072.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C53-2(8308.898mil,2112.284mil) on Top Layer And Track (8206.535mil,2151.654mil)(8277.402mil,2151.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C54-2(8308.898mil,2027.284mil) on Top Layer And Track (8206.535mil,1987.913mil)(8277.402mil,1987.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C54-2(8308.898mil,2027.284mil) on Top Layer And Track (8206.535mil,2066.654mil)(8277.402mil,2066.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C55-2(8308.898mil,2454.872mil) on Top Layer And Track (8206.535mil,2415.502mil)(8277.402mil,2415.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C55-2(8308.898mil,2454.872mil) on Top Layer And Track (8206.535mil,2494.242mil)(8277.402mil,2494.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C56-1(8175.039mil,2369.872mil) on Top Layer And Track (8206.535mil,2330.502mil)(8277.402mil,2330.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C56-1(8175.039mil,2369.872mil) on Top Layer And Track (8206.535mil,2409.242mil)(8277.402mil,2409.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C57-2(8308.898mil,2284.872mil) on Top Layer And Track (8206.535mil,2245.502mil)(8277.402mil,2245.502mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C57-2(8308.898mil,2284.872mil) on Top Layer And Track (8206.535mil,2324.242mil)(8277.402mil,2324.242mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C60-1(8175.039mil,1117.284mil) on Top Layer And Track (8206.535mil,1077.913mil)(8277.402mil,1077.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C60-1(8175.039mil,1117.284mil) on Top Layer And Track (8206.535mil,1156.654mil)(8277.402mil,1156.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C60-2(8308.898mil,1117.284mil) on Top Layer And Track (8206.535mil,1077.913mil)(8277.402mil,1077.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C60-2(8308.898mil,1117.284mil) on Top Layer And Track (8206.535mil,1156.654mil)(8277.402mil,1156.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad C66-1(4376.61mil,2088.501mil) on Top Layer And Track (4328.972mil,2090.47mil)(4328.972mil,2125.903mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
|
Silk To Solder Mask Clearance Constraint: (8.311mil < 10mil) Between Pad C66-1(4376.61mil,2088.501mil) on Top Layer And Track (4328.972mil,2125.903mil)(4424.248mil,2125.903mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.311mil]
|
Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad C66-1(4376.61mil,2088.501mil) on Top Layer And Track (4424.248mil,2090.47mil)(4424.248mil,2125.903mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C69-2(5253.461mil,1899.328mil) on Bottom Layer And Track (5224.975mil,1872.128mil)(5224.975mil,1926.594mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C69-2(5253.461mil,1899.328mil) on Bottom Layer And Track (5224.975mil,1872.128mil)(5250.957mil,1872.128mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C69-2(5253.461mil,1899.328mil) on Bottom Layer And Track (5224.975mil,1926.594mil)(5250.957mil,1926.594mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (7.841mil < 10mil) Between Pad C70-1(4255.035mil,1224.328mil) on Top Layer And Track (4290.468mil,1147.855mil)(4290.468mil,1181.053mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.841mil]
|
Silk To Solder Mask Clearance Constraint: (7.841mil < 10mil) Between Pad C70-1(4255.035mil,1224.328mil) on Top Layer And Track (4290.468mil,1267.602mil)(4290.468mil,1300.801mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.841mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C76-2(8308.898mil,1027.284mil) on Top Layer And Track (8206.535mil,1066.654mil)(8277.402mil,1066.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C76-2(8308.898mil,1027.284mil) on Top Layer And Track (8206.535mil,987.913mil)(8277.402mil,987.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C77-1(8175.039mil,1287.284mil) on Top Layer And Track (8206.535mil,1247.913mil)(8277.402mil,1247.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C77-1(8175.039mil,1287.284mil) on Top Layer And Track (8206.535mil,1326.654mil)(8277.402mil,1326.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C82-1(5206.61mil,1232.871mil) on Bottom Layer And Track (5178.124mil,1205.605mil)(5178.124mil,1260.071mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C82-1(5206.61mil,1232.871mil) on Bottom Layer And Track (5178.124mil,1205.605mil)(5204.106mil,1205.605mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C82-1(5206.61mil,1232.871mil) on Bottom Layer And Track (5178.124mil,1260.071mil)(5204.106mil,1260.071mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad C83-1(5256.61mil,1684.328mil) on Bottom Layer And Track (5228.124mil,1657.062mil)(5228.124mil,1711.528mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad C83-1(5256.61mil,1684.328mil) on Bottom Layer And Track (5228.124mil,1657.062mil)(5254.106mil,1657.062mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad C83-1(5256.61mil,1684.328mil) on Bottom Layer And Track (5228.124mil,1711.528mil)(5254.106mil,1711.528mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C84-1(1745mil,3822.913mil) on Top Layer And Track (1683.276mil,3788.8mil)(1683.276mil,3820.508mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5.023mil < 10mil) Between Pad C84-1(1745mil,3822.913mil) on Top Layer And Track (1683.276mil,3788.8mil)(1806.724mil,3788.8mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.023mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C84-1(1745mil,3822.913mil) on Top Layer And Track (1806.724mil,3788.8mil)(1806.724mil,3820.508mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C84-2(1745mil,3937.087mil) on Top Layer And Track (1683.276mil,3939.492mil)(1683.276mil,3971.2mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5.023mil < 10mil) Between Pad C84-2(1745mil,3937.087mil) on Top Layer And Track (1683.276mil,3971.2mil)(1806.724mil,3971.2mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.023mil]
|
Silk To Solder Mask Clearance Constraint: (6.228mil < 10mil) Between Pad C84-2(1745mil,3937.087mil) on Top Layer And Track (1775.276mil,3972.252mil)(1782.165mil,3972.252mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.228mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C84-2(1745mil,3937.087mil) on Top Layer And Track (1806.724mil,3939.492mil)(1806.724mil,3971.2mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C85-1(1610mil,3822.913mil) on Top Layer And Track (1548.276mil,3788.8mil)(1548.276mil,3820.508mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5.023mil < 10mil) Between Pad C85-1(1610mil,3822.913mil) on Top Layer And Track (1548.276mil,3788.8mil)(1671.724mil,3788.8mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.023mil]
|
Silk To Solder Mask Clearance Constraint: (5.074mil < 10mil) Between Pad C85-1(1610mil,3822.913mil) on Top Layer And Track (1671.724mil,3788.8mil)(1671.724mil,3820.508mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.074mil]
|
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C86-1(1715mil,4030mil) on Top Layer And Track (1715mil,3990mil)(1749mil,3990mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
|
Silk To Solder Mask Clearance Constraint: (5mil < 10mil) Between Pad C86-1(1715mil,4030mil) on Top Layer And Track (1715mil,4070mil)(1749mil,4070mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5mil]
|
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C86-1(1715mil,4030mil) on Top Layer And Track (1749mil,3990mil)(1749mil,4030mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
|
Silk To Solder Mask Clearance Constraint: (5.5mil < 10mil) Between Pad C86-1(1715mil,4030mil) on Top Layer And Track (1749mil,4030mil)(1749mil,4070mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.5mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C87-1(8175.039mil,927.284mil) on Top Layer And Track (8206.535mil,887.913mil)(8277.402mil,887.913mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (9.258mil < 10mil) Between Pad C87-1(8175.039mil,927.284mil) on Top Layer And Track (8206.535mil,966.654mil)(8277.402mil,966.654mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.258mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C89-1(7180.472mil,3582.284mil) on Top Layer And Track (7181.85mil,3561.784mil)(7204.85mil,3561.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C89-1(7180.472mil,3582.284mil) on Top Layer And Track (7181.85mil,3602.784mil)(7204.85mil,3602.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C89-1(7180.472mil,3582.284mil) on Top Layer And Track (7204.85mil,3561.784mil)(7204.85mil,3602.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C94-1(7380.118mil,3347.284mil) on Top Layer And Track (7381.496mil,3326.784mil)(7404.496mil,3326.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C94-1(7380.118mil,3347.284mil) on Top Layer And Track (7381.496mil,3367.784mil)(7404.496mil,3367.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C94-1(7380.118mil,3347.284mil) on Top Layer And Track (7404.496mil,3326.784mil)(7404.496mil,3367.784mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad C98-2(8006.196mil,4055.229mil) on Bottom Layer And Track (7981.818mil,4034.729mil)(7981.818mil,4075.729mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C98-2(8006.196mil,4055.229mil) on Bottom Layer And Track (7981.818mil,4034.729mil)(8004.818mil,4034.729mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad C98-2(8006.196mil,4055.229mil) on Bottom Layer And Track (7981.818mil,4075.729mil)(8004.818mil,4075.729mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (8.326mil < 10mil) Between Pad D10-3(7774.095mil,3576.772mil) on Top Layer And Text "D10" (7744.233mil,3609.788mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.326mil]
|
Silk To Solder Mask Clearance Constraint: (7.477mil < 10mil) Between Pad L7-2(6492.835mil,3537.284mil) on Top Layer And Text "C131" (6530.902mil,3514.788mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.477mil]
|
Silk To Solder Mask Clearance Constraint: (7.165mil < 10mil) Between Pad L7-2(6492.835mil,3537.284mil) on Top Layer And Track (6529.094mil,3457.284mil)(6529.094mil,3491.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.165mil]
|
Silk To Solder Mask Clearance Constraint: (7.169mil < 10mil) Between Pad L7-2(6492.835mil,3537.284mil) on Top Layer And Track (6529.094mil,3491.284mil)(6569.094mil,3491.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.169mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q13-9(7511.614mil,2237.284mil) on Top Layer And Track (7595.079mil,2130.984mil)(7595.079mil,2138.858mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q13-9(7511.614mil,2237.284mil) on Top Layer And Track (7595.079mil,2335.709mil)(7595.079mil,2343.583mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q14-9(7512.559mil,2460.157mil) on Top Layer And Track (7596.024mil,2353.858mil)(7596.024mil,2361.732mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q14-9(7512.559mil,2460.157mil) on Top Layer And Track (7596.024mil,2558.583mil)(7596.024mil,2566.457mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q5-9(7900.039mil,2015.158mil) on Top Layer And Track (7983.504mil,1908.858mil)(7983.504mil,1916.732mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (6.121mil < 10mil) Between Pad Q5-9(7900.039mil,2015.158mil) on Top Layer And Track (7983.504mil,2113.583mil)(7983.504mil,2121.457mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.121mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R104-1(2083.74mil,3377.599mil) on Top Layer And Track (2085.118mil,3357.099mil)(2108.118mil,3357.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R104-1(2083.74mil,3377.599mil) on Top Layer And Track (2085.118mil,3398.099mil)(2108.118mil,3398.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R104-1(2083.74mil,3377.599mil) on Top Layer And Track (2108.118mil,3357.099mil)(2108.118mil,3398.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R105-2(2635.276mil,3426.063mil) on Top Layer And Track (2610.898mil,3405.563mil)(2610.898mil,3446.563mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R105-2(2635.276mil,3426.063mil) on Top Layer And Track (2610.898mil,3405.563mil)(2633.898mil,3405.563mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R105-2(2635.276mil,3426.063mil) on Top Layer And Track (2610.898mil,3446.563mil)(2633.898mil,3446.563mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R106-2(2037.874mil,3427.599mil) on Top Layer And Track (2013.496mil,3407.099mil)(2013.496mil,3448.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R106-2(2037.874mil,3427.599mil) on Top Layer And Track (2013.496mil,3407.099mil)(2036.496mil,3407.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R106-2(2037.874mil,3427.599mil) on Top Layer And Track (2013.496mil,3448.099mil)(2036.496mil,3448.099mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R24-1(1935mil,3837.284mil) on Top Layer And Track (1906.514mil,3810.084mil)(1906.514mil,3864.55mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R24-1(1935mil,3837.284mil) on Top Layer And Track (1906.514mil,3810.084mil)(1932.496mil,3810.084mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R24-1(1935mil,3837.284mil) on Top Layer And Track (1906.514mil,3864.55mil)(1932.496mil,3864.55mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R25-1(7711.496mil,4102.441mil) on Top Layer And Track (7690.996mil,4078.063mil)(7690.996mil,4101.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R25-1(7711.496mil,4102.441mil) on Top Layer And Track (7690.996mil,4078.063mil)(7731.996mil,4078.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R25-1(7711.496mil,4102.441mil) on Top Layer And Track (7731.996mil,4078.063mil)(7731.996mil,4101.063mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R28-2(2015.472mil,3752.284mil) on Bottom Layer And Track (2017.976mil,3725.017mil)(2043.959mil,3725.017mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R28-2(2015.472mil,3752.284mil) on Bottom Layer And Track (2017.976mil,3779.483mil)(2043.959mil,3779.483mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R28-2(2015.472mil,3752.284mil) on Bottom Layer And Track (2043.959mil,3725.017mil)(2043.959mil,3779.483mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R29-1(7511.654mil,3535.315mil) on Top Layer And Track (7491.154mil,3510.937mil)(7491.154mil,3533.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R29-1(7511.654mil,3535.315mil) on Top Layer And Track (7491.154mil,3510.937mil)(7532.154mil,3510.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R29-1(7511.654mil,3535.315mil) on Top Layer And Track (7532.154mil,3510.937mil)(7532.154mil,3533.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R29-2(7511.654mil,3582.559mil) on Top Layer And Track (7491.154mil,3583.937mil)(7491.154mil,3606.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R29-2(7511.654mil,3582.559mil) on Top Layer And Track (7491.154mil,3606.937mil)(7532.154mil,3606.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R29-2(7511.654mil,3582.559mil) on Top Layer And Track (7532.154mil,3583.937mil)(7532.154mil,3606.937mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad R32-1(4276.61mil,1972.241mil) on Top Layer And Track (4228.972mil,1934.84mil)(4228.972mil,1970.273mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
|
Silk To Solder Mask Clearance Constraint: (8.311mil < 10mil) Between Pad R32-1(4276.61mil,1972.241mil) on Top Layer And Track (4228.972mil,1934.84mil)(4324.248mil,1934.84mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.311mil]
|
Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad R32-1(4276.61mil,1972.241mil) on Top Layer And Track (4324.248mil,1934.84mil)(4324.248mil,1970.273mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R33-1(4196.61mil,1912.832mil) on Top Layer And Track (4169.344mil,1884.346mil)(4169.344mil,1910.328mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R33-1(4196.61mil,1912.832mil) on Top Layer And Track (4169.344mil,1884.346mil)(4223.81mil,1884.346mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R33-1(4196.61mil,1912.832mil) on Top Layer And Track (4223.81mil,1884.346mil)(4223.81mil,1910.328mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R33-2(4196.61mil,1975.824mil) on Top Layer And Track (4169.344mil,1978.328mil)(4169.344mil,2004.31mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R33-2(4196.61mil,1975.824mil) on Top Layer And Track (4169.344mil,2004.31mil)(4223.81mil,2004.31mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R33-2(4196.61mil,1975.824mil) on Top Layer And Track (4223.81mil,1978.328mil)(4223.81mil,2004.31mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R40-2(4331.61mil,1644.328mil) on Top Layer And Track (4303.124mil,1617.062mil)(4303.124mil,1671.528mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R40-2(4331.61mil,1644.328mil) on Top Layer And Track (4303.124mil,1617.062mil)(4329.106mil,1617.062mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R40-2(4331.61mil,1644.328mil) on Top Layer And Track (4303.124mil,1671.528mil)(4329.106mil,1671.528mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R41-1(4051.61mil,1667.32mil) on Bottom Layer And Track (4024.344mil,1669.824mil)(4024.344mil,1695.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R41-1(4051.61mil,1667.32mil) on Bottom Layer And Track (4024.344mil,1695.806mil)(4078.81mil,1695.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R41-1(4051.61mil,1667.32mil) on Bottom Layer And Track (4078.81mil,1669.824mil)(4078.81mil,1695.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R43-2(5251.61mil,1764.328mil) on Top Layer And Track (5224.41mil,1735.842mil)(5224.41mil,1761.824mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R43-2(5251.61mil,1764.328mil) on Top Layer And Track (5224.41mil,1735.842mil)(5278.876mil,1735.842mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (3.661mil < 10mil) Between Pad R43-2(5251.61mil,1764.328mil) on Top Layer And Track (5225.311mil,1484.997mil)(5225.311mil,2193.659mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [3.661mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R43-2(5251.61mil,1764.328mil) on Top Layer And Track (5278.876mil,1735.842mil)(5278.876mil,1761.824mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (4.999mil < 10mil) Between Pad R45-2(5251.61mil,1827.32mil) on Bottom Layer And Track (5224.41mil,1829.824mil)(5224.41mil,1855.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [4.999mil]
|
Silk To Solder Mask Clearance Constraint: (5.301mil < 10mil) Between Pad R45-2(5251.61mil,1827.32mil) on Bottom Layer And Track (5224.41mil,1855.806mil)(5278.876mil,1855.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.301mil]
|
Silk To Solder Mask Clearance Constraint: (5.065mil < 10mil) Between Pad R45-2(5251.61mil,1827.32mil) on Bottom Layer And Track (5278.876mil,1829.824mil)(5278.876mil,1855.806mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.065mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R52-1(7296.496mil,1242.284mil) on Top Layer And Track (7275.996mil,1243.661mil)(7275.996mil,1266.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R52-1(7296.496mil,1242.284mil) on Top Layer And Track (7275.996mil,1266.661mil)(7316.996mil,1266.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R52-1(7296.496mil,1242.284mil) on Top Layer And Track (7316.996mil,1243.661mil)(7316.996mil,1266.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R52-2(7296.496mil,1195.039mil) on Top Layer And Track (7275.996mil,1170.661mil)(7275.996mil,1193.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R52-2(7296.496mil,1195.039mil) on Top Layer And Track (7275.996mil,1170.661mil)(7316.996mil,1170.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R52-2(7296.496mil,1195.039mil) on Top Layer And Track (7316.996mil,1170.661mil)(7316.996mil,1193.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R56-1(6361.756mil,4177mil) on Bottom Layer And Track (6337.378mil,4156.5mil)(6337.378mil,4197.5mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R56-1(6361.756mil,4177mil) on Bottom Layer And Track (6337.378mil,4156.5mil)(6360.378mil,4156.5mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R56-1(6361.756mil,4177mil) on Bottom Layer And Track (6337.378mil,4197.5mil)(6360.378mil,4197.5mil) on Bottom Overlay [Bottom Overlay] to [Bottom Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R64-2(7336.496mil,3459.41mil) on Top Layer And Track (7315.996mil,3460.787mil)(7315.996mil,3483.787mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R64-2(7336.496mil,3459.41mil) on Top Layer And Track (7315.996mil,3483.787mil)(7356.996mil,3483.787mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R64-2(7336.496mil,3459.41mil) on Top Layer And Track (7356.996mil,3460.787mil)(7356.996mil,3483.787mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R66-1(7039mil,3331mil) on Top Layer And Track (7014.622mil,3310.5mil)(7014.622mil,3351.5mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R66-1(7039mil,3331mil) on Top Layer And Track (7014.622mil,3310.5mil)(7037.622mil,3310.5mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R66-1(7039mil,3331mil) on Top Layer And Track (7014.622mil,3351.5mil)(7037.622mil,3351.5mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R67-1(6891.496mil,3528.662mil) on Top Layer And Track (6870.996mil,3504.284mil)(6870.996mil,3527.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R67-1(6891.496mil,3528.662mil) on Top Layer And Track (6870.996mil,3504.284mil)(6911.996mil,3504.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R67-1(6891.496mil,3528.662mil) on Top Layer And Track (6911.996mil,3504.284mil)(6911.996mil,3527.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R68-1(7140.472mil,3377.284mil) on Top Layer And Track (7119.972mil,3378.662mil)(7119.972mil,3401.662mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R68-1(7140.472mil,3377.284mil) on Top Layer And Track (7119.972mil,3401.662mil)(7160.972mil,3401.662mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R68-1(7140.472mil,3377.284mil) on Top Layer And Track (7160.972mil,3378.662mil)(7160.972mil,3401.662mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
|
Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R77-1(7446.496mil,3205.905mil) on Top Layer And Track (7425.996mil,3207.284mil)(7425.996mil,3230.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R77-1(7446.496mil,3205.905mil) on Top Layer And Track (7425.996mil,3230.284mil)(7466.996mil,3230.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R77-1(7446.496mil,3205.905mil) on Top Layer And Track (7466.996mil,3207.284mil)(7466.996mil,3230.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R79-2(7391.496mil,3052.284mil) on Top Layer And Track (7370.996mil,3053.661mil)(7370.996mil,3076.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R79-2(7391.496mil,3052.284mil) on Top Layer And Track (7370.996mil,3076.661mil)(7411.996mil,3076.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R79-2(7391.496mil,3052.284mil) on Top Layer And Track (7411.996mil,3053.661mil)(7411.996mil,3076.661mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R83-1(7919.094mil,3584.528mil) on Top Layer And Track (7898.594mil,3585.906mil)(7898.594mil,3608.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R83-1(7919.094mil,3584.528mil) on Top Layer And Track (7898.594mil,3608.906mil)(7939.594mil,3608.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R83-1(7919.094mil,3584.528mil) on Top Layer And Track (7939.594mil,3585.906mil)(7939.594mil,3608.906mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad R9-2(764.646mil,2117.284mil) on Top Layer And Track (766.614mil,2069.646mil)(802.047mil,2069.646mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
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Silk To Solder Mask Clearance Constraint: (7.721mil < 10mil) Between Pad R9-2(764.646mil,2117.284mil) on Top Layer And Track (766.614mil,2164.921mil)(802.047mil,2164.921mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.721mil]
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Silk To Solder Mask Clearance Constraint: (8.311mil < 10mil) Between Pad R9-2(764.646mil,2117.284mil) on Top Layer And Track (802.047mil,2069.646mil)(802.047mil,2164.921mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.311mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R92-2(7421.496mil,1643.307mil) on Top Layer And Track (7400.996mil,1644.685mil)(7400.996mil,1667.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (5.13mil < 10mil) Between Pad R92-2(7421.496mil,1643.307mil) on Top Layer And Track (7400.996mil,1667.685mil)(7441.996mil,1667.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.13mil]
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Silk To Solder Mask Clearance Constraint: (5.189mil < 10mil) Between Pad R92-2(7421.496mil,1643.307mil) on Top Layer And Track (7441.996mil,1644.685mil)(7441.996mil,1667.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [5.189mil]
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Silk To Solder Mask Clearance Constraint: (6.153mil < 10mil) Between Pad RT1-2(6931.496mil,3585.079mil) on Top Layer And Track (6911.996mil,3577.284mil)(6911.996mil,3600.284mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [6.153mil]
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Silk To Solder Mask Clearance Constraint: (9.624mil < 10mil) Between Pad U14-8(7506.496mil,2947.284mil) on Top Layer And Track (7468.762mil,2947.78mil)(7468.762mil,2973.762mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [9.624mil]
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Silk To Solder Mask Clearance Constraint: (8.043mil < 10mil) Between Pad U15-7(7478.15mil,1592.284mil) on Top Layer And Track (7441.996mil,1571.685mil)(7441.996mil,1594.685mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [8.043mil]
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Silk To Solder Mask Clearance Constraint: (Collision < 10mil) Between Pad U16-5(6491.496mil,3447.284mil) on Top Layer And Track (6388.346mil,3454.724mil)(6514.331mil,3454.724mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [0mil]
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Silk To Solder Mask Clearance Constraint: (7.476mil < 10mil) Between Pad U16-5(6491.496mil,3447.284mil) on Top Layer And Track (6507.244mil,3445.315mil)(6507.244mil,3452.205mil) on Top Overlay [Top Overlay] to [Top Solder] clearance [7.476mil]
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