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74AC11032

ACTIVE

4-ch, 2-input, 3-V to 5.5-V 24-mA drive strength OR gate

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Data sheet

74AC11032

ACTIVE
Data sheet Order now

Product details

Technology family AC Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AC Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 IOH (max) (mA) -24 Input type Standard CMOS Output type Push-Pull Features Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 100 Rating Catalog Operating temperature range (°C) -40 to 85
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8 SSOP (DB) 16 48.36 mm² 6.2 x 7.8
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)

 

EPIC is a trademark of Texas Instruments Incorporated.
  • Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
  • EPICTM (Enhanced-Performance Implanted CMOS) 1-m Process
  • 500-mA Typical Latch-Up Immunity at 125°C
  • Package Options Include Plastic Small-Outline (D) and Shrink Small-Outline (DB) Packages, and Standard Plastic 300-mil DIPs (N)

 

EPIC is a trademark of Texas Instruments Incorporated.

This device contains four independent 2-input OR gates. It performs the Boolean function

Y= A + B or in positive logic.

The 74AC11032 is characterized for operation from -40°C to 85°C.

 

 

This device contains four independent 2-input OR gates. It performs the Boolean function

Y= A + B or in positive logic.

The 74AC11032 is characterized for operation from -40°C to 85°C.

 

 
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Technical documentation

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Type Title Date
* Data sheet Quadruple 2-Input Positive-OR Gate datasheet (Rev. C) 01 Apr 1996
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
More literature HiRel Unitrode Power Management Brochure 07 Jul 2009
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

74AC11032 Behavioral SPICE Model

SCAM067.ZIP (7 KB) - PSpice Model
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Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
SSOP (DB) 16 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

Ordering & quality

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