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CD4502B-MIL

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Military 6-ch, 3-V to 18-V inverters

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Data sheet

CD4502B-MIL

ACTIVE
Data sheet Order now

Product details

Technology family CD4000 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Number of channels 6 IOL (max) (mA) 6 IOH (max) (mA) -1 Supply current (max) (µA) 30 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
Technology family CD4000 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Number of channels 6 IOL (max) (mA) 6 IOH (max) (mA) -1 Supply current (max) (µA) 30 Input type Standard CMOS Output type Push-Pull Features Standard speed (tpd > 50ns) Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
  • 2 TTL-load output drive capability
  • 3-state outputs
  • Common output-disable control
  • Inhibit control
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Noise Margin (full package-temperature range) =
       1 V at VDD = 5 V
       2 V at VDD = 10 V
       2.5 V at VDD = 15 V
  • Applications:
    • 3-state hex inverter for interfacing IC's with data buses
    • COS/MOS to TTL hex buffer
  • 2 TTL-load output drive capability
  • 3-state outputs
  • Common output-disable control
  • Inhibit control
  • 100% tested for quiescent current at 20 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Noise Margin (full package-temperature range) =
       1 V at VDD = 5 V
       2 V at VDD = 10 V
       2.5 V at VDD = 15 V
  • Applications:
    • 3-state hex inverter for interfacing IC's with data buses
    • COS/MOS to TTL hex buffer

CD4502B consists of six inverter/buffers with 3-state outputs. A logic "1" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B"-series IOL standard.

The CD4502B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4502B consists of six inverter/buffers with 3-state outputs. A logic "1" on the OUTPUT DISABLE input produces a high-impedance state in all six outputs. This feature permits common busing of the outputs, thus simplifying system design. A Logic "1" on the INHIBIT input switches all six outputs to logic "0" if the OUTPUT DISABLE input is a logic "0". This device is capable of driving two standard TTL loads, which is equivalent to six times the JEDEC "B"-series IOL standard.

The CD4502B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (NSR suffix), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).
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Type Title Date
* Data sheet CD4502B TYPES datasheet (Rev. B) 27 Jun 2003
* SMD CD4502B-MIL SMD 7702002EA 21 Jun 2016
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics 03 Dec 2001

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