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XOR (exclusive OR) gates

CD54HCT86

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Military 4-ch, 2-input, 4.5-V to 5.5-V XOR (exclusive OR) gates with TTL-compatible CMOS inputs

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Data sheet

CD54HCT86

ACTIVE
Data sheet Order now

Product details

Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 5.2 Input type TTL-Compatible CMOS IOH (max) (mA) -5.2 Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating Military Operating temperature range (°C) -55 to 125
Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 5.2 Input type TTL-Compatible CMOS IOH (max) (mA) -5.2 Output type Push-Pull Features High speed (tpd 10- 50ns) Data rate (max) (Mbps) 28 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67
  • LSTTL input logic compatible
    • VIL(max) = 0.8V, VIH(min) = 2V
  • CMOS input logic compatible
    • II ≤ 1µA at VOL, VOH
  • Buffered inputs
  • 4.5V to 5.5V operation
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs
  • LSTTL input logic compatible
    • VIL(max) = 0.8V, VIH(min) = 2V
  • CMOS input logic compatible
    • II ≤ 1µA at VOL, VOH
  • Buffered inputs
  • 4.5V to 5.5V operation
  • Wide operating temperature range: -55°C to +125°C
  • Supports fanout up to 10 LSTTL loads
  • Significant power reduction compared to LSTTL logic ICs

This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic.

This device contains four independent 2-input XOR gates. Each gate performs the Boolean function Y = A ⊕ B in positive logic.
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Technical documentation

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Type Title Date
* Data sheet CDx4HCT86 Quadruple 2-Input XOR Gates datasheet (Rev. A) PDF | HTML 27 Aug 2024
* SMD CD54HCT86 SMD 5962-89844 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

Design & development

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CDIP (J) 14 Ultra Librarian
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