Product details

Sampling rate (max) (kHz) 192 Rating Automotive Operating temperature range (°C) -40 to 105
Sampling rate (max) (kHz) 192 Rating Automotive Operating temperature range (°C) -40 to 105
TQFP (PFB) 48 81 mm² 9 x 9
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade:
      • DIX4192I-Q1: Grade 3 (–40°C to +85°C)
      • DIX4192T-Q1: Grade 2 (–40°C to +105°C)
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Digital Audio Interface Transmitter (DIT)
    • PCM/Encoded data to S/PDIF Conversion
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and
      CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • S/PDIF to Stereo PCM Conversion / Encoded data
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade:
      • DIX4192I-Q1: Grade 3 (–40°C to +85°C)
      • DIX4192T-Q1: Grade 2 (–40°C to +105°C)
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classification Level C4B
  • Digital Audio Interface Transmitter (DIT)
    • PCM/Encoded data to S/PDIF Conversion
    • Supports Sampling Rates Up to 216 kHz
    • Includes Differential Line Driver and
      CMOS-Buffered Outputs
  • Digital Audio Interface Receiver (DIR)
    • S/PDIF to Stereo PCM Conversion / Encoded data
    • PLL Lock Range Includes Sampling Rates from 20 kHz to 216 kHz
    • Four Differential-Input Line Receivers and an Input Multiplexer
    • Bypass Multiplexer Routes Line Receiver Outputs to Line Driver and Buffer Outputs
    • Automatic Detection of Non-PCM Audio Streams (DTS CD/LD and IEC 61937 formats)
    • Audio CD Q-Channel Sub-Code Decoding and Data Buffer
    • Low Jitter Recovered Clock Output
  • User-Selectable Serial Host Interface: SPI™ or I2C
    • Provides Access to On-Chip Registers and Data Buffers
    • Status Registers and Interrupt Generation for Flag and Error Conditions
    • Block-Sized Data Buffers for Both Channel Status and User Data
  • Two Audio Serial Ports (Ports A and B)
    • Synchronous Serial Interface to External Signal Processors, Data Converters, and Logic
    • Slave or Master Mode Operation With Sampling Rates Up to 216 kHz
    • Supports Left-Justified, Right-Justified, and Philips I2S™ Data Formats
    • Supports Audio Data Word Lengths Up to
      24 Bits
  • Four General-Purpose Digital Outputs
    • Multifunction Programmable Through Control Registers
  • Extensive Power-Down Support
    • Functional Blocks May Be Disabled Individually When Not In Use
  • Operates From 1.8-V Core and 3.3-V I/O Power Supplies
  • Small TQFP-48 Package, Compatible With the SRC4382 and SRC4392

The DIX4192-Q1 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192-Q1 device is configured using on-chip control registers and data buffers, which are accessed through either a four-wire serial peripheral interface (SPI) port, or a two-wire I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192-Q1 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low-voltage logic interfaces typically found on digital signal processors and programmable logic devices.

The DIX4192-Q1 device is available in a lead-free, TQFP-48 package.

The DIX4192-Q1 device is a highly-integrated CMOS device designed for use in professional and broadcast digital audio systems. The DIX4192-Q1 combines a digital audio interface receiver (DIR) and transmitter (DIT), two audio serial ports, and flexible distribution logic for interconnection of the function block data and clocks.

The DIR and DIT are compatible with the AES3, S/PDIF, IEC 60958, and EIAJ CP-1201 interface standards. The audio serial ports and DIT may be operated at sampling rates up to 216 kHz. The DIR lock range includes sampling rates from 20 kHz to 216 kHz.

The DIX4192-Q1 device is configured using on-chip control registers and data buffers, which are accessed through either a four-wire serial peripheral interface (SPI) port, or a two-wire I2C bus interface. Status registers provide access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control register settings. A master reset input pin is provided for initialization by a host processor or supervisory functions.

The DIX4192-Q1 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to 3.6 V, providing compatibility with low-voltage logic interfaces typically found on digital signal processors and programmable logic devices.

The DIX4192-Q1 device is available in a lead-free, TQFP-48 package.

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Type Title Date
* Data sheet DIX4192-Q1 Integrated Digital Audio Interface Receiver and Transmitter datasheet (Rev. A) 13 Sep 2016

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DIX4192EVM-PDK — DIX4192 Evaluation Module (EVM) and USB motherboard

The DIX4192EVM-PDK provides a modular solution for evaluating the function and performance of the DIX4192 device from Texas Instruments. The PDK includes a motherboard (DAIMB) and a daughterboard (DIX4192EVM). Together, the daughter and mother boards form a modular platform for evaluating the (...)

User guide: PDF
Not available on TI.com
Simulation model

DIX4192 IBIS Model

SBFM018.ZIP (155 KB) - IBIS Model
Simulation tool

PSPICE-FOR-TI — PSpice® for TI design and simulation tool

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
Package Pins CAD symbols, footprints & 3D models
TQFP (PFB) 48 Ultra Librarian

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