Features for the J784S4XEVM
- TDA4AP-Q1, TDA4VP-Q1, TDA4AH-Q1 and TDA4VH-Q1 superset processor (J784S4)
- Optimized power solution [power management integrated circuit (PMIC)]
- Four dynamic random-access memory (DRAM), 32GB LPDDR4‐4266
- Expanded serial peripheral interface (xSPI) NOR flash, 512Mb memory (8 bit)
- 1Gb octal NAND
Description for the J784S4XEVM
The J784S4 evaluation module (EVM) is a platform for evaluating the TDA4AP-Q1, TDA4VP-Q1, TDA4AH-Q1 and TDA4VH-Q1 processors in vision analytics and networking applications throughout automotive and industrial markets. These processors perform particularly well in multicamera, sensor fusion and advanced driver-assistance system (ADAS) domain-control applications.
TDA4AP-Q1, TDA4VP-Q1, TDA4AH-Q1 and TDA4VH-Q1 processors have a powerful heterogeneous architecture that includes a mix of DSP cores, Arm® Cortex®-A72 cores, matrix math acceleration for artificial intelligence (AI), integrated image signal processor (ISP) and vision-processing acceleration, 3D graphics processing unit (GPU) cores, and H.264 and H.265 encode and decode acceleration.
An integrated safety microcontroller unit (MCU) includes dual-lockstep Arm Cortex-R5F cores that aid the system in achieving ASIL-D-level certification. Integrated peripherals allow for multicamera input via CSI-2 ports, vehicle connectivity based on peripheral component interconnect express (PCIe), controller area network with flexible data rate (CAN FD) and gigabit Ethernet switching, and display connectivity via the display serial interface (DSI).
J784S4EVM is supported by the processor SDK, which includes foundational drivers, compute and vision kernels, and example application frameworks and demonstrations that show you how to take advantage of the powerful heterogeneous architecture of Jacinto™ 7 processors.