Product details

Vn at 1 kHz (nV√Hz) 0.8 Breakdown voltage (V) 40 VDS (V) 40 VGS (V) -40 VGSTH typ (typ) (V) -1.2 Rating Catalog Operating temperature range (°C) -40 to 125
Vn at 1 kHz (nV√Hz) 0.8 Breakdown voltage (V) 40 VDS (V) 40 VGS (V) -40 VGSTH typ (typ) (V) -1.2 Rating Catalog Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Ultra-low noise:
    • Voltage noise:
      • 0.8 nV/√ Hz at 1 kHz, I DS = 5 mA
      • 0.9 nV/√ Hz at 1 kHz, I DS = 2 mA
    • Current noise: 1.8 fA/√ Hz at 1 kHz
  • Low gate current: 10 pA (max)
  • Low input capacitance: 24 pF at V DS = 5 V

  • High gate-to-drain and gate-to-source breakdown voltage: –40 V

  • High transconductance: 68 mS

  • Packages: Small SC70 and SOT-23

  • Ultra-low noise:
    • Voltage noise:
      • 0.8 nV/√ Hz at 1 kHz, I DS = 5 mA
      • 0.9 nV/√ Hz at 1 kHz, I DS = 2 mA
    • Current noise: 1.8 fA/√ Hz at 1 kHz
  • Low gate current: 10 pA (max)
  • Low input capacitance: 24 pF at V DS = 5 V

  • High gate-to-drain and gate-to-source breakdown voltage: –40 V

  • High transconductance: 68 mS

  • Packages: Small SC70 and SOT-23

The JFE150 is a Burr-Brown™ discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE150 features performance not previously available in older discrete JFET technologies. The JFE150 offers the maximum possible noise-to-power efficiency and flexibility, where the quiescent current can be set by the user and yields excellent noise performance for currents from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.8 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). The JFE150 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high-leakage, nonlinear, external diodes.

The JFE150 can withstand a high drain-to-source voltage of 40 V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The device is offered in 5-pin SOT-23 and SC70 packages.

The JFE150 is a Burr-Brown™ discrete JFET built using Texas Instruments’ modern, high-performance, analog bipolar process. The JFE150 features performance not previously available in older discrete JFET technologies. The JFE150 offers the maximum possible noise-to-power efficiency and flexibility, where the quiescent current can be set by the user and yields excellent noise performance for currents from 50 µA to 20 mA. When biased at 5 mA, the device yields 0.8 nV/√ Hz of input-referred noise, giving ultra-low noise performance with extremely high input impedance (> 1 TΩ). The JFE150 also features integrated diodes connected to separate clamp nodes to provide protection without the addition of high-leakage, nonlinear, external diodes.

The JFE150 can withstand a high drain-to-source voltage of 40 V, as well as gate-to-source and gate-to-drain voltages down to –40 V. The temperature range is specified from –40°C to +125°C. The device is offered in 5-pin SOT-23 and SC70 packages.

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Technical documentation

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Type Title Date
* Data sheet JFE150 Ultra-Low-Noise, Low-Gate-Current, Audio, N-Channel JFET datasheet (Rev. B) PDF | HTML 25 Apr 2023
Certificate JFE150EVM EU RoHS Declaration of Conformity (DoC) 28 Feb 2022
User guide JFE150EVM User's Guide PDF | HTML 25 Feb 2022
Application note JFE150 Ultra-Low-Noise Pre-Amp PDF | HTML 06 Oct 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

DIP-ADAPTER-EVM — DIP adapter evaluation module

Speed up your op amp prototyping and testing with the DIP adapter evaluation module (DIP-ADAPTER-EVM), which provides a fast, easy and inexpensive way to interface with small surface-mount ICs. You can connect any supported op amp using the included Samtec terminal strips or wire them (...)

User guide: PDF
Not available on TI.com
Evaluation board

JFE150EVM — JFE150 evaluation module for ultra-low-noise, low-gate-current audio N-channel JFET

The JFE150 evaluation module (EVM) is intended to provide basic functional evaluation of the JFE150. The EVM is configured in a closed-loop preamplifier configuration providing 60 dB of gain on a single 12-V supply. User modifications can be made for a variety of circuit configurations.

User guide: PDF | HTML
Not available on TI.com
Simulation model

JFE150 PSpice Model (Rev. I)

SLPM349I.ZIP (44 KB) - PSpice Model
Simulation model

JFE150 PSpice Transient Reference Design Model

SLPM358.ZIP (66 KB) - PSpice Model
Simulation model

JFE150 SPICE Model (Generic)

SLPM366.ZIP (4 KB) - TISpice Model
Simulation model

JFE150 TINA-TI Reference Design (Rev. B)

SLPM351B.ZIP (24 KB) - TINA-TI Reference Design
Simulation model

JFE150 TINA-TI Spice Model (Rev. B)

SLPM350B.ZIP (10 KB) - TINA-TI Spice Model
Simulation model

JFE150 Ultra-Low Noise Piezoelectric Amplifier PSpice Reference Circuit

SLPM353.ZIP (140 KB) - PSpice Model
Simulation model

JFE150 Ultra-Low Noise Piezoelectric Amplifier TINA-TI Reference Circuit

SLPM352.ZIP (15 KB) - TINA-TI Reference Design
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian
SOT-SC70 (DCK) 5 Ultra Librarian

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