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LMK00725

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Low skew, 1-to-5, differential-to-3.3-V LVPECL fanout buffer

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Data sheet

LMK00725

ACTIVE
Data sheet Order now

Product details

Function Differential, Fanout Additive RMS jitter (typ) (fs) 43 Output frequency (max) (MHz) 650 Number of outputs 5 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 35 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type HCSL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
Function Differential, Fanout Additive RMS jitter (typ) (fs) 43 Output frequency (max) (MHz) 650 Number of outputs 5 Output supply voltage (V) 3.3 Core supply voltage (V) 3.3 Output skew (ps) 35 Features Pin control Operating temperature range (°C) -40 to 85 Rating Catalog Output type LVPECL Input type HCSL, LVCMOS, LVDS, LVPECL, LVTTL, SSTL
TSSOP (PW) 20 41.6 mm² 6.5 x 6.4
  • Five 3.3V Differential LVPECL Outputs
    • Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz
    • Noise Floor (≥1 MHz offset):
      –158 dBc/Hz (typ) @ 312.5 MHz
    • Output Frequency: 650 MHz (max)
    • Output Skew: 35 ps (max)
    • Part-to-Part Skew: 100 ps (max)
    • Propagation Delay: 0.37 ns (max)
  • Two Differential Input Pairs (pin-selectable)
    • CLKx, nCLK Input Pairs can accept LVPECL,
      LVDS, HCSL, SSTL, LVHSTL, or Single-Ended
      Signals
  • Synchronous Clock Enable
  • Power Supply: 3.3V ±5%
  • Package: 20-Lead TSSOP
  • Industrial Temperature Range: –40°C to +85°C
  • Five 3.3V Differential LVPECL Outputs
    • Additive Jitter: 43 fs RMS (typ) @ 312.5 MHz
    • Noise Floor (≥1 MHz offset):
      –158 dBc/Hz (typ) @ 312.5 MHz
    • Output Frequency: 650 MHz (max)
    • Output Skew: 35 ps (max)
    • Part-to-Part Skew: 100 ps (max)
    • Propagation Delay: 0.37 ns (max)
  • Two Differential Input Pairs (pin-selectable)
    • CLKx, nCLK Input Pairs can accept LVPECL,
      LVDS, HCSL, SSTL, LVHSTL, or Single-Ended
      Signals
  • Synchronous Clock Enable
  • Power Supply: 3.3V ±5%
  • Package: 20-Lead TSSOP
  • Industrial Temperature Range: –40°C to +85°C

The LMK00725 is a low skew, high-performance clock fanout buffer which can distribute up to five 3.3V LVPECL outputs from one of two inputs, which can accept differential or single-ended inputs. The clock enable input is synchronized internally to eliminate runt or glitch pulses on the outputs when the clock enable pin is asserted or de-asserted. The low additive jitter and phase noise floor and ensured output and part-to-part skew characteristics make the LMK00725 ideal for applications demanding high performance and repeatability.

The LMK00725 is a low skew, high-performance clock fanout buffer which can distribute up to five 3.3V LVPECL outputs from one of two inputs, which can accept differential or single-ended inputs. The clock enable input is synchronized internally to eliminate runt or glitch pulses on the outputs when the clock enable pin is asserted or de-asserted. The low additive jitter and phase noise floor and ensured output and part-to-part skew characteristics make the LMK00725 ideal for applications demanding high performance and repeatability.
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Type Title Date
* Data sheet LMK00725 Low Skew, 1-to-5, Differential-to-3.3V LVPECL Fanout Buf datasheet (Rev. A) 30 Oct 2013
EVM User's guide LMK00725EVM User’s Guide 06 Sep 2013

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