Packaging information
| Package | Pins VQFN (RGZ) | 48 |
| Operating temperature range (°C) -40 to 85 |
| Package qty | Carrier 2,500 | LARGE T&R |
Features for the LMK05318
- Ultra-low jitter BAW VCO based Ethernet clocks
- 32fs typical RMS jitter at 312.5MHz with 4MHz 1st order high-pass filter (HPF)
- 44fs typical RMS jitter at 156.25MHz with 4MHz 1st order HPF
- 50fs typical/ 80fs maximum RMS jitter at 312.5MHz
- 60fs typical/ 90fs maximum RMS jitter at 156.25MHz
- One high-performance Digital Phase-Locked Loop (DPLL) paired with two Analog Phase-Locked Loops (APLLs):
- 1mHz to 4kHz programmable DPLL loop bandwidth
- < 1ppt per step DCO adjustment for IEEE 1588 PTP clock steering
- Two differential or single-ended DPLL inputs
- 2MHz to 800MHz input frequency
- Digital holdover and hitless switching
- Eight differential outputs with programmable AC-LVPECL, AC-CML,
AC-LVDS, HSCL, and 1.8V LVCMOS output formats.
- 2MHz to 800MHz input frequency
- PCIe Gen 1 to 6 compliant
- I2C, 3-wire SPI, or 4-wire SPI
- 3.3V core supply and 1.8V, 2.5V, or 3.3V output supply
- –40°C to +85°C operating temperature
Description for the LMK05318
The LMK05318 is high-performance network synchronizer and jitter cleaner designed to meet the stringent requirements of Ethernet-based networking applications.
The device integrates one DPLL and two APLLs to provide hitless switching and jitter attenuation using the programmable loop bandwidths (LBWs) with one external loop filter capacitor to maximize the flexibility and ease of use.
APLL1 features an ultra-high performance PLL with TI’s proprietary Bulk Acoustic Wave (BAW) technology in VCO1 and can generate 312.5MHz output clocks with 50fs typical RMS jitter (12kHz to 20MHz) irrespective of the DPLL reference input frequency and jitter characteristics. APLL2 features a conventional LC VCO to provide options for a second frequency and/or synchronization domain.
The integrated EEPROM can be used for custom system configurations on start-up. Internal LDO regulators provide excellent power supply noise rejection (PSNR) to reduce the cost and complexity of the power delivery network.