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SN74HCS126-Q1

ACTIVE

Automotive Schmitt-trigger inputs quadruple bus buffer gates with 3-state outputs

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Data sheet

SN74HCS126-Q1

ACTIVE
Data sheet Order now

Product details

Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 4 IOL (max) (mA) -7.8 Supply current (max) (µA) 2 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Automotive Operating temperature range (°C) -40 to 125
Technology family HCS Supply voltage (min) (V) 2 Supply voltage (max) (V) 6 Number of channels 4 IOL (max) (mA) -7.8 Supply current (max) (µA) 2 IOH (max) (mA) -7.8 Input type Schmitt-Trigger Output type 3-State Features Balanced outputs, High speed (tpd 10-50ns), Input clamp diode Rating Automotive Operating temperature range (°C) -40 to 125
SOIC (D) 14 51.9 mm² 8.65 x 6 TSSOP (PW) 14 32 mm² 5 x 6.4
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V
  • AEC-Q100 Qualified for automotive applications:
    • Device temperature grade 1: –40°C to +125°C, TA
    • Device HBM ESD Classification Level 2
    • Device CDM ESD Classifcation Level C6
  • Wide operating voltage range: 2 V to 6 V
  • Schmitt-trigger inputs allow for slow or noisy input signals
  • Low power consumption
    • Typical ICC of 100 nA
    • Typical input leakage current of ±100 nA
  • ±7.8-mA output drive at 6 V

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a Low on the OE pin

This device contains four independent buffer with 3-state outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A in positive logic. The outputs can be put into a Hi-Z state by applying a Low on the OE pin
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* Data sheet SN74HCS126-Q1 Quadruple Bus Buffer Gates with 3-State Outputs datasheet (Rev. A) 08 Mar 2021

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
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Simulation model

SN74HCS126 IBIS Model

SCLM175.ZIP (250 KB) - IBIS Model
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Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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