Product details

Technology family LS Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) 0 to 70 Rating Catalog
Technology family LS Function Digital Multiplexer Configuration 2:1 Number of channels 4 Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 16 181.42 mm² 19.3 x 9.4 SOIC (D) 16 59.4 mm² 9.9 x 6 SOP (NS) 16 79.56 mm² 10.2 x 7.8
  • Buffered Inputs and Outputs
  • Three Speed/Power Ranges Available
  • Applications
    • Expand Any Data Input Point
    • Multiplex Dual Data Buses
    • Generate Four Functions of Two Variables (One Variable Is Common)
    • Source Programmable Counters

  • Buffered Inputs and Outputs
  • Three Speed/Power Ranges Available
  • Applications
    • Expand Any Data Input Point
    • Multiplex Dual Data Buses
    • Generate Four Functions of Two Variables (One Variable Is Common)
    • Source Programmable Counters

These monolithic data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ’157, ’LS157, and ’S157 present true data whereas the ’LS158 and ’S158 present inverted data to minimize propagation delay time.

These monolithic data selectors/multiplexers contain inverters and drivers to supply full on-chip data selection to the four output gates. A separate strobe input is provided. A 4-bit word is selected from one of two sources and is routed to the four outputs. The ’157, ’LS157, and ’S157 present true data whereas the ’LS158 and ’S158 present inverted data to minimize propagation delay time.

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Technical documentation

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Type Title Date
* Data sheet SN54157, SN54LS157, SN54LS158, SN54S157, SN54S158, SN74157, SN74LS157, SN74LS158 datasheet (Rev. A) 01 Mar 1974
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Designing with the SN54/74LS123 (Rev. A) 01 Mar 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Package Pins CAD symbols, footprints & 3D models
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian

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