Product details

Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 16 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
Technology family LV-A Supply voltage (min) (V) 2 Supply voltage (max) (V) 5.5 Number of channels 6 IOL (max) (mA) 16 IOH (max) (mA) 0 Supply current (max) (µA) 20 Input type Standard CMOS Output type Open-drain Features Over-voltage tolerant inputs, Partial power down (Ioff), Very high speed (tpd 5-10ns) Rating Catalog Operating temperature range (°C) -40 to 125
SOIC (D) 14 51.9 mm² 8.65 x 6 SOP (NS) 14 79.56 mm² 10.2 x 7.8 SSOP (DB) 14 48.36 mm² 6.2 x 7.8 TSSOP (PW) 14 32 mm² 5 x 6.4 TVSOP (DGV) 14 23.04 mm² 3.6 x 6.4
  • VCC operation of 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are disabled during power up and power down with inputs tied to VCC
  • Support mixed-mode voltage operation on all ports
  • Ioff supports live insertion, partial power down mode, and back drive protection
  • Latch-up performance exceeds 100 mA per JESD 78, Class II
  • VCC operation of 2 V to 5.5 V
  • Max tpd of 6.5 ns at 5 V
  • Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
  • Typical VOHV (Output VOH Undershoot) > 2.3 V at VCC = 3.3 V, TA = 25°C
  • Outputs are disabled during power up and power down with inputs tied to VCC
  • Support mixed-mode voltage operation on all ports
  • Ioff supports live insertion, partial power down mode, and back drive protection
  • Latch-up performance exceeds 100 mA per JESD 78, Class II

These hex inverter buffers/drivers are designed for 2 V to 5.5 V VCC operation.

The SN74LV06A device performs the Boolean function Y = A in positive logic.

The open-drain output require pull-up resistors to perform correctly and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.

These hex inverter buffers/drivers are designed for 2 V to 5.5 V VCC operation.

The SN74LV06A device performs the Boolean function Y = A in positive logic.

The open-drain output require pull-up resistors to perform correctly and can be connected to other open-drain outputs to implement active-low wired-OR or active-high wired-AND functions.

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Technical documentation

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* Data sheet SN74LV06A Hex Inverter Buffers/Drivers With Open-Drain Outputs datasheet (Rev. K) PDF | HTML 16 Mar 2023

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML
Not available on TI.com
Simulation model

SN74LV06A Behavioral SPICE Model

SCEM661.ZIP (7 KB) - PSpice Model
Package Pins CAD symbols, footprints & 3D models
SOIC (D) 14 Ultra Librarian
SOP (NS) 14 Ultra Librarian
SSOP (DB) 14 Ultra Librarian
TSSOP (PW) 14 Ultra Librarian
TVSOP (DGV) 14 Ultra Librarian

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