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SN74LV1T00

ACTIVE

Single power supply 2-input POSITIVE NAND gate logic level shifter

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Data sheet

SN74LV1T00

ACTIVE
Data sheet Order now

Product details

Technology family LV1T Number of channels 1 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -8 IOL (max) (mA) 8 Supply current (max) (µA) 10 Features Over-voltage tolerant inputs, Single supply, Voltage translation Input type TTL-Compatible CMOS Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -40 to 125
Technology family LV1T Number of channels 1 Vout (min) (V) 1.65 Vout (max) (V) 5.5 Data rate (max) (Mbps) 100 IOH (max) (mA) -8 IOL (max) (mA) 8 Supply current (max) (µA) 10 Features Over-voltage tolerant inputs, Single supply, Voltage translation Input type TTL-Compatible CMOS Output type Balanced CMOS, Push-Pull Operating temperature range (°C) -40 to 125
SOT-23 (DBV) 5 8.12 mm² 2.9 x 2.8 SOT-SC70 (DCK) 5 4.2 mm² 2 x 2.1
  • Single-supply voltage translator at 5.0/3.3/2.5/1.8V VCC
  • Operating range of 1.8V to 5.5V
    • Up translation:
      • 1.2V1 to 1.8V
      • 1.5V1 to 2.5V
      • 1.8V1 to 3.3V
      • 3.3V1 to 5.0V
    • Down translation:
      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Logic output is referenced to VCC
  • Output drive
    • 8mA output drive at 5V
    • 7mA output drive at 3.3V
    • 3mA output drive at 1.8V
  • Characterized up to 50MHz at 3.3V VCC
  • 5V tolerance on input pins
  • –40°C to 125°C operating temperature range
  • Pb-free packages available: SC-70 (DCK)
    • 2 × 2.1 × 0.65mm
  • Latch-up performance exceeds 250mA order number package body size per JESD 17
  • Supports standard Logic pinouts
  • CMOS output B compatible with AUP1G and LVC1G families
  • Single-supply voltage translator at 5.0/3.3/2.5/1.8V VCC
  • Operating range of 1.8V to 5.5V
    • Up translation:
      • 1.2V1 to 1.8V
      • 1.5V1 to 2.5V
      • 1.8V1 to 3.3V
      • 3.3V1 to 5.0V
    • Down translation:
      • 5.0V, 3.3V, 2.5V to 1.8V
      • 5.0V, 3.3V to 2.5V
      • 5.0V to 3.3V
  • Logic output is referenced to VCC
  • Output drive
    • 8mA output drive at 5V
    • 7mA output drive at 3.3V
    • 3mA output drive at 1.8V
  • Characterized up to 50MHz at 3.3V VCC
  • 5V tolerance on input pins
  • –40°C to 125°C operating temperature range
  • Pb-free packages available: SC-70 (DCK)
    • 2 × 2.1 × 0.65mm
  • Latch-up performance exceeds 250mA order number package body size per JESD 17
  • Supports standard Logic pinouts
  • CMOS output B compatible with AUP1G and LVC1G families

SN74LV1T00 is a low voltage CMOS gate logic that operates at a wider voltage range for industrial, portable, telecom, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8V/2.5V/3.3V/5V CMOS levels

The input is designed with a lower threshold circuit to match 1.8V input logic at VCC = 3.3V and can be used in 1.8V to 3.3V level up translation. In addition, the 5V tolerant input pins enable down translation (e.g. 3.3V to 2.5V output at VCC = 2.5V). The wide VCC range of 1.8V to 5.5V allows generation of desired output levels to connect to controllers or processors.

The SN74LV1T00 is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.

SN74LV1T00 is a low voltage CMOS gate logic that operates at a wider voltage range for industrial, portable, telecom, and automotive applications. The output level is referenced to the supply voltage and is able to support 1.8V/2.5V/3.3V/5V CMOS levels

The input is designed with a lower threshold circuit to match 1.8V input logic at VCC = 3.3V and can be used in 1.8V to 3.3V level up translation. In addition, the 5V tolerant input pins enable down translation (e.g. 3.3V to 2.5V output at VCC = 2.5V). The wide VCC range of 1.8V to 5.5V allows generation of desired output levels to connect to controllers or processors.

The SN74LV1T00 is designed with current-drive capability of 8 mA to reduce line reflections, overshoot, and undershoot caused by high-drive outputs.
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Technical documentation

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Type Title Date
* Data sheet SN74LV1T00 Single Power Supply 2-Input Positive NAND Gate CMOS Logic Level Shifter datasheet (Rev. E) PDF | HTML 25 Jul 2024
Application note LV1T Family of single supply translators (Rev. B) PDF | HTML 16 Dec 2022
Selection guide Voltage Translation Buying Guide (Rev. A) 15 Apr 2021
Application note Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B) 30 Apr 2015
Application note Selecting the Right Level Translation Solution (Rev. A) 22 Jun 2004

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

5-8-LOGIC-EVM — Generic logic evaluation module for 5-pin to 8-pin DCK, DCT, DCU, DRL and DBV packages

Flexible EVM designed to support any device that has a DCK, DCT, DCU, DRL, or DBV package in a 5 to 8 pin count.
User guide: PDF
Not available on TI.com
Simulation model

SN74LV1T00 Behavioral SPICE Model

SCLM187.ZIP (7 KB) - PSpice Model
Download
Simulation model

SN74LV1T00 IBIS Model (Rev. A)

SCLM103A.ZIP (43 KB) - IBIS Model
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Schematic: PDF
Reference designs

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Schematic: PDF
Package Pins CAD symbols, footprints & 3D models
SOT-23 (DBV) 5 Ultra Librarian
SOT-SC70 (DCK) 5 Ultra Librarian
TI's Standard Terms and Conditions for Evaluation Items apply.

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