TXS0101

ACTIVE

1-bit bidirectional voltage-level shifter for open-drain and push-pull applications

Product details

Technology family TXS Bits (#) 1 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 14.4 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
Technology family TXS Bits (#) 1 Data rate (max) (Mbps) 24 High input voltage (min) (V) 1.45 High input voltage (max) (V) 5.5 Vout (min) (V) 1.65 Vout (max) (V) 5.5 IOH (max) (mA) 0 IOL (max) (mA) 0 Supply current (max) (µA) 14.4 Features Edge rate accelerator, Output enable, Partial power down (Ioff), Vcc isolation Input type Transmission Gate Output type 3-State, Transmission Gate Rating Catalog Operating temperature range (°C) -40 to 85
DSBGA (YZP) 6 2.1875 mm² 1.75 x 1.25 SOT-23 (DBV) 6 8.12 mm² 2.9 x 2.8 SOT-5X3 (DRL) 6 2.56 mm² 1.6 x 1.6 SOT-SC70 (DCK) 6 4.2 mm² 2 x 2.1
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A Port:
      • 2500V Human-Body Model (A114-B)
      • 200V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
    • B port:
      • 8kV Human-Body Model (A114-B)
      • 200V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoFree™ package
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port ( VCCA ≤ VCCB)
  • VCC isolation feature – if either VCC input is at GND, both ports are in the high-impedance state
  • No power-supply sequencing required – either VCCA or VCCB can be ramped first
  • Ioff supports partial-power-down mode operation
  • Latch-up performance exceeds 100mA per JESD 78, class II
  • ESD protection exceeds JESD 22:
    • A Port:
      • 2500V Human-Body Model (A114-B)
      • 200V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
    • B port:
      • 8kV Human-Body Model (A114-B)
      • 200V Machine Model (A115-A)
      • 1500V Charged-Device Model (C101)
  • No direction-control signal needed
  • Maximum data rates:
    • 24Mbps (push pull)
    • 2Mbps (open drain)
  • Available in the Texas Instruments NanoFree™ package
  • 1.65V to 3.6V on A port and 2.3V to 5.5V on B port ( VCCA ≤ VCCB)
  • VCC isolation feature – if either VCC input is at GND, both ports are in the high-impedance state
  • No power-supply sequencing required – either VCCA or VCCB can be ramped first
  • Ioff supports partial-power-down mode operation

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB . The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To put the device in the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

This one-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.65V to 3.6V. VCCA must be less than or equal to VCCB . The B port is designed to track VCCB. VCCB accepts any supply voltage from 2.3V to 5.5V. This allows for low voltage bidirectional translation between any of the 1.8V, 2.5V, 3.3V, and 5V voltage nodes.

When the output-enable (OE) input is low, all outputs are placed in the high-impedance state.

To put the device in the high-impedance state during power up or power down, tie OE to GND through a pull-down resistor; the current-sourcing capability of the driver determines the minimum value of the resistor.

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Design & development

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Evaluation board

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Evaluation board

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User guide: PDF | HTML
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Simulation model

HSPICE Model for TXS0101

SCEJ264.ZIP (96 KB) - HSpice Model
Simulation model

TXS0101 IBIS Model

SCEM527.ZIP (24 KB) - IBIS Model
Package Pins CAD symbols, footprints & 3D models
DSBGA (YZP) 6 Ultra Librarian
SOT-23 (DBV) 6 Ultra Librarian
SOT-5X3 (DRL) 6 Ultra Librarian
SOT-SC70 (DCK) 6 Ultra Librarian

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