Home Logic & voltage translation Logic gates NOR gates
Home
Logic & voltage translation
Logic gates
NOR gates

CD4001UB-MIL

ACTIVE

Military 4-ch, 2-input, 3-V to 18-V NOR gates

Order now
Data sheet

CD4001UB-MIL

ACTIVE
Data sheet Order now

Product details

Technology family CD4000 Number of channels 4 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Inputs per channel 2 IOL (max) (mA) 1.5 IOH (max) (mA) -1.5 Output type Push-Pull Input type Standard CMOS Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Military Operating temperature range (°C) -55 to 125
Technology family CD4000 Number of channels 4 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Inputs per channel 2 IOL (max) (mA) 1.5 IOH (max) (mA) -1.5 Output type Push-Pull Input type Standard CMOS Features Standard speed (tpd > 50ns) Data rate (max) (Mbps) 8 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67
  • Propagation delay time = 30 ns (typ.) at CL = 50 pF, VDD = 10 V
  • Standardized symmetrical output characteristics
  • 100% tested for maximum quiescent current at 20 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings

Data sheet acquired from Harris Semiconductor
  • Propagation delay time = 30 ns (typ.) at CL = 50 pF, VDD = 10 V
  • Standardized symmetrical output characteristics
  • 100% tested for maximum quiescent current at 20 V
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"
  • Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • 5-V, 10-V, and 15-V parametric ratings

Data sheet acquired from Harris Semiconductor

CD4001UB quad 2-input NOR gate provides the system designer with direct implementation of the NOR function and supplements the existing family of CMOS gates.

The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4001UB quad 2-input NOR gate provides the system designer with direct implementation of the NOR function and supplements the existing family of CMOS gates.

The CD4001UB types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).
filter Find other NOR gates
Download

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet CD4001UB TYPES datasheet (Rev. C) 21 Aug 2003

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​