Product details

Function Addressable latch Number of channels 8 Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Output type Push-Pull Data rate (max) (Mbps) 50 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Partial power down (Ioff), Standard speed (tpd > 50ns), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
Function Addressable latch Number of channels 8 Technology family HCT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Output type Push-Pull Data rate (max) (Mbps) 50 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Partial power down (Ioff), Standard speed (tpd > 50ns), Very high speed (tpd 5-10ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 16 135.3552 mm² 19.56 x 6.92
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Technical documentation

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Type Title Date
* Data sheet CDx4HC(T)259 High-Speed SMOS Logic 8-Bit Addressable Latch datasheet (Rev. D) PDF | HTML 22 Nov 2021
* SMD CD54HCT259 SMD 5962-89852 21 Jun 2016
Application note Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 15 Dec 2022
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
User guide Signal Switch Data Book (Rev. A) 14 Nov 2003
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note CMOS Power Consumption and CPD Calculation (Rev. B) 01 Jun 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note SN54/74HCT CMOS Logic Family Applications and Restrictions 01 May 1996
Application note Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc 01 Apr 1996

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CDIP (J) 16 Ultra Librarian

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