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High-speed DACs (>10 MSPS)

DAC2904

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Dual-Channel, 14-Bit, 125-MSPS Digital-to-Analog Converter (DAC)

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Data sheet

DAC2904

ACTIVE
Data sheet Order now

Product details

Resolution (Bits) 14 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 125 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 310 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 14 Number of DAC channels 2 Interface type Parallel CMOS Sample/update rate (Msps) 125 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 310 SFDR (dB) 82 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
TQFP (PFB) 48 81 mm² 9 x 9
  • 125MSPS UPDATE RATE
  • SINGLE SUPPLY: +3.3V or +5V
  • HIGH SFDR: 78dB at fOUT = 10MHz
  • LOW GLITCH: 2pV-s
  • LOW POWER: 310mW
  • INTERNAL REFERENCE
  • POWER-DOWN MODE: 23mW
  • APPLICATIONS
    • COMMUNICATIONS:
      • Base Stations, WLL, WLAN
      • Baseband I/Q Modulation
    • MEDICAL/TEST INSTRUMENTATION
    • ARBITRARY WAVEFORM GENERATORS (ARB)
    • DIRECT DIGITAL SYNTHESIS (DDS)

All trademarks are the property of their respective owners.
  • 125MSPS UPDATE RATE
  • SINGLE SUPPLY: +3.3V or +5V
  • HIGH SFDR: 78dB at fOUT = 10MHz
  • LOW GLITCH: 2pV-s
  • LOW POWER: 310mW
  • INTERNAL REFERENCE
  • POWER-DOWN MODE: 23mW
  • APPLICATIONS
    • COMMUNICATIONS:
      • Base Stations, WLL, WLAN
      • Baseband I/Q Modulation
    • MEDICAL/TEST INSTRUMENTATION
    • ARBITRARY WAVEFORM GENERATORS (ARB)
    • DIRECT DIGITAL SYNTHESIS (DDS)

All trademarks are the property of their respective owners.

The DAC2904 is a monolithic, 14-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW.

Operating with high update rates of up to 125MSPS, the DAC2904 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for “Direct IF” applications. The DAC2904 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight-gain and offset matching.

Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.

The DAC2904 combines high dynamic performance with a high update rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:

  • Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
  • Pin compatible to the AD9767 dual DAC.
  • Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
  • The DAC2904 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
  • All digital inputs are +3.3V and +5V logic compatible. The DAC2904 has an internal reference circuit, and allows use in a multiplying configuration.

The DAC2904 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.

The DAC2904 is a monolithic, 14-bit, dual-channel, high-speed Digital-to-Analog Converter (DAC), and is optimized to provide high dynamic performance while dissipating only 310mW.

Operating with high update rates of up to 125MSPS, the DAC2904 offers exceptional dynamic performance, and enables the generation of very-high output frequencies suitable for “Direct IF” applications. The DAC2904 has been optimized for communications applications in which separate I and Q data are processed while maintaining tight-gain and offset matching.

Each DAC has a high-impedance differential-current output, suitable for single-ended or differential analog-output configurations.

The DAC2904 combines high dynamic performance with a high update rate to create a cost-effective solution for a wide variety of waveform-synthesis applications:

  • Pin compatibility between family members provides 10-bit (DAC2900), 12-bit (DAC2902), and 14-bit (DAC2904) resolution.
  • Pin compatible to the AD9767 dual DAC.
  • Gain matching is typically 0.5% of full-scale, and offset matching is specified at 0.02% max.
  • The DAC2904 utilizes an advanced CMOS process; the segmented architecture minimizes output-glitch energy, and maximizes the dynamic performance.
  • All digital inputs are +3.3V and +5V logic compatible. The DAC2904 has an internal reference circuit, and allows use in a multiplying configuration.

The DAC2904 is available in a TQFP-48 package, and is specified over the extended industrial temperature range of –40°C to +85°C.
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Technical documentation

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Type Title Date
* Data sheet Dual, 14-Bit, 125 MSPS Digital-to-Analog Converter datasheet (Rev. C) 14 Oct 2004
Application note Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) 08 May 2015
User guide TSW3000 Demo Kit (Rev. B) 20 Nov 2005
User guide TSW3000 Demo Kit (Rev. A) 26 Sep 2005
EVM User's guide DAC290x-EVM: Demo Board (Rev. B) 20 Sep 2005

Design & development

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Simulation model

DAC2904 IBIS Model for 3.3V

SLWC052.ZIP (6 KB) - IBIS Model
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Simulation model

DAC2904 IBIS Model for 5V

SLWC053.ZIP (5 KB) - IBIS Model
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Calculation tool

MATCHGAIN-CALC — Wideband Comp Current Output DAC to SE Interface: Impr Matching for Gain & Compliance Volt Swing

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