SN54BCT8245A

ACTIVO

Dispositivos de prueba de exploración con transceptores de bus octales

Detalles del producto

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL-Compatible CMOS Output type 3-State Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family BCT Rating Military Operating temperature range (°C) -55 to 125
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 64 IOH (max) (mA) -32 Input type TTL-Compatible CMOS Output type 3-State Features Partial power down (Ioff), Very high speed (tpd 5-10ns) Technology family BCT Rating Military Operating temperature range (°C) -55 to 125
CDIP (JT) 24 221.44 mm² 32 x 6.92 LCCC (FK) 28 130.6449 mm² 11.43 x 11.43
  • Members of the Texas Instruments SCOPETM Family of Testability Products
  • Octal Test-Integrated Circuits
  • Functionally Equivalent to 'F245 and 'BCT245 in the Normal- Function Mode
  • Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
  • Test Operation Synchronous to Test Access Port (TAP)
  • Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS Pin
  • SCOPETM Instruction Set
    • IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
    • Parallel-Signature Analysis at Inputs
    • Pseudo-Random Pattern Generation From Outputs
    • Sample Inputs/Toggle Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)

 

SCOPE is a trademark of Texas Instruments Incorporated.

  • Members of the Texas Instruments SCOPETM Family of Testability Products
  • Octal Test-Integrated Circuits
  • Functionally Equivalent to 'F245 and 'BCT245 in the Normal- Function Mode
  • Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
  • Test Operation Synchronous to Test Access Port (TAP)
  • Implement Optional Test Reset Signal by Recognizing a Double-High-Level Voltage (10 V) on TMS Pin
  • SCOPETM Instruction Set
    • IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
    • Parallel-Signature Analysis at Inputs
    • Pseudo-Random Pattern Generation From Outputs
    • Sample Inputs/Toggle Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic and Ceramic 300-mil DIPs (JT, NT)

 

SCOPE is a trademark of Texas Instruments Incorporated.

The 'BCT8245A scan test devices with octal bus transceivers are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the 'F245 and 'BCT245 octal bus transceivers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETM octal bus transceivers.

In the test mode, the normal operation of the SCOPETM octal bus transceivers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary-scan test operations as described in IEEE Standard 1149.1-1990.

 

Four dedicated test terminals control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54BCT8245A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8245A is characterized for operation from 0°C to 70°C.

The 'BCT8245A scan test devices with octal bus transceivers are members of the Texas Instruments SCOPETM testability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are functionally equivalent to the 'F245 and 'BCT245 octal bus transceivers. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device terminals or to perform a self test on the boundary-test cells. Activating the TAP in normal mode does not affect the functional operation of the SCOPETM octal bus transceivers.

In the test mode, the normal operation of the SCOPETM octal bus transceivers is inhibited and the test circuitry is enabled to observe and control the I/O boundary of the device. When enabled, the test circuitry can perform boundary-scan test operations as described in IEEE Standard 1149.1-1990.

 

Four dedicated test terminals control the operation of the test circuitry: test data input (TDI), test data output (TDO), test mode select (TMS), and test clock (TCK). Additionally, the test circuitry performs other testing functions such as parallel-signature analysis (PSA) on data inputs and pseudo-random pattern generation (PRPG) from data outputs. All testing and scan operations are synchronized to the TAP interface.

The SN54BCT8245A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74BCT8245A is characterized for operation from 0°C to 70°C.

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Documentación técnica

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Tipo Título Fecha
* Data sheet Scan Test Devices With Octal Bus Transceivers datasheet (Rev. E) 01 jul 1996
* SMD SN54BCT8245A SMD 5962-91728 21 jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 jul 2021
Selection guide Logic Guide (Rev. AB) 12 jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 dic 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 ene 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 ago 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 ago 1997
Application note Designing With Logic (Rev. C) 01 jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 oct 1996
Application note Live Insertion 01 oct 1996

Diseño y desarrollo

Para conocer los términos adicionales o los recursos necesarios, haga clic en cualquier título de abajo para ver la página de detalles cuando esté disponible.

Modelo de simulación

BSDL Model of SN74BCT8245A

SCTM043.ZIP (2 KB) - BSDL Model
Modelo de simulación

BSDL Model of SN74BCT8245A (A to B Port)

SCTM003.ZIP (2 KB) - BSDL Model
Encapsulado Pines Símbolos CAD, huellas y modelos 3D
CDIP (JT) 24 Ultra Librarian
LCCC (FK) 28 Ultra Librarian

Pedidos y calidad

Información incluida:
  • RoHS
  • REACH
  • Marcado del dispositivo
  • Acabado de plomo/material de la bola
  • Clasificación de nivel de sensibilidad a la humedad (MSL) / reflujo máximo
  • Estimaciones de tiempo medio entre fallas (MTBF)/fallas en el tiempo (FIT)
  • Contenido del material
  • Resumen de calificaciones
  • Monitoreo continuo de confiabilidad
Información incluida:
  • Lugar de fabricación
  • Lugar de ensamblaje

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