Información de empaque
| Encapsulado | Pines TSSOP (PW) | 14 |
| Rango de temperatura de funcionamiento (℃) -40 to 85 |
| Cant. de paquetes | Empresa de transporte 90 | TUBE |
Características para SN74LV21A
- 2-V to 5.5-V V CC Operation
- Max t pd of 6 ns at 5 V
- Typical V OLP (Output Ground Bounce) <0.8 V at V CC = 3.3 V, T A = 25°C
- Typical V OHV (Output V OH Undershoot) >2.3 V at V CC = 3.3 V, TA = 25°C
- I off Supports Partial-Power-Down Mode Operation
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
Descripción de SN74LV21A
These dual 4-input positive-AND gates are designed for 2-V to 5.5-V V CC operation.
The SN74LV21A devices perform the Boolean function Y = A • B • C • D in positive logic.
These devices are fully specified for partial-power-down applications using I off. The I off circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down.