TB5R3
- Functional Replacement for the Agere BRF1A
- Pin Equivalent to General Trade 26LS32
- High Input Impedance Approximately 8 k
- <2.6-ns Maximum Propagation Delay
- TB5R3 Provides 50-mV Hysteresis (Typical)
- -1.1-V to 7.1-V Common-Mode Input Voltage Range
- Single 5-V ±10% Supply
- ESD Protection HBM > 3 kV and CDM > 2 kV
- Operating Temperature Range: -40°C to 85°C
- Available in Gull-Wing SOIC (JEDEC MS-013, DW) and SOIC (D) Package
- APPLICATIONS
- Digital Data or Clock Transmission Over Balanced Lines
These quad differential receivers accept digital data over balanced transmission lines. They translate differential input logic levels to TTL output logic levels.
The TB5R3 is a pin- and function-compatible replacement for the Agere systems BRF1A; it includes 3-kV HBM and 2-kV CDM ESD protection.
The power-down loading characteristics of the receiver input circuit are approximately 8 k relative to the power supplies; hence they do not load the transmission line when the circuit is powered down.
The packaging for this differential line receiver is a 16-pin gull wing SOIC (DW) or a 16 pin SOIC (D).
The enable inputs of this device include internal pull-up resistors of approximately 40 k that are connected to VCC to ensure a logical high level input if the inputs are open circuited.
Parametric values specified under the Electrical Characteristics and Timing Characteristics sections for the data transmission driver devices are measured with the following output load circuits.
技術資料
| 種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | データシート | Quad Differential PECL Receivers データシート (Rev. A) | 2007年 10月 23日 |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
- リード端子の仕上げ / ボールの原材料
- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
- 使用原材料
- 認定試験結果
- 継続的な信頼性モニタ試験結果
- ファブの拠点
- 組み立てを実施した拠点