TPS3306
- Dual Supervisory Circuits With Power-Fail for DSP and Processor-Based Systems
- Voltage Monitor for Power-Fail or Low-Battery Warning
- Watchdog Timer With 0.8 Second Time-Out
- Power-On Reset Generator With Integrated 100 ms Delay Time
- Open-Drain Reset and Power-Fail Output
- Supply Current of 15 µA (Typ.)
- Supply Voltage Range: 7 V to 6 V
- Defined RESET Output From VDD ≥ 1.1 V
- MSOP-8 and SO-8 Packages
- Temperature Range: -40°C to +85°C
- APPLICATIONS
- Multivoltage DSPs and Processors
- Portable Battery-Powered Equipment
- Embedded Control Systems
- Intelligent Instruments
- Automotive Systems
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The TPS3306 family is a series of supervisory circuits designed for circuit initialization which require two supply voltages, primarily in DSP and processor-based systems.
The product spectrum of the TPS3306-xx is designed for monitoring two independent supply voltages of 3.3 V/1.5 V, 3.3 V/1.8 V, 3.3 V/2 V, 3.3 V/2.5 V, or 3.3 V/5 V.
The various supervisory circuits are designed to monitor the nominal supply voltage.
During power-on, RESET is asserted when the supply voltage VDD becomes higher than 1.1 V. Thereafter, the supervisory circuits monitor the SENSEn inputs and keep RESET active as long as SENSEn remains below the threshold voltage VIT.
An internal timer delays the return of the RESET output to the inactive state (high) to ensure proper system reset. The delay time, td(typ) = 100 ms, starts after SENSE1 and SENSE2 inputs have risen above the threshold voltage VIT. When the voltage at SENSE1 or SENSE2 input drops below the threshold voltage VIT, the output becomes active (low) again.
The integrated power-fail (PFI) comparator with separate open-drain (PFO) output can be used for low-battery detection, power-fail warning, or for monitoring a power supply other than the main supply.
The TPS3306-xx devices integrate a watchdog timer that is periodically triggered by a positive or negative transition of WDI. When the supervising system fails to retrigger the watchdog circuit within the time-out interval, tt(out) = 0.50 s, RESET becomes active for the time period td. This event also reinitializes the watchdog timer. Leaving WDI unconnected disables the watchdog.
The TPS3306-xx devices are available in either 8-pin MSOP or standard 8-pin SO packages, and are characterized for operation over a temperature range of -40°C to +85°C.
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技術資料
| 種類 | タイトル | 最新の英語版をダウンロード | 日付 | |||
|---|---|---|---|---|---|---|
| * | データシート | Dual-Processor Supervisory Circuits with Power-Fail データシート (Rev. C) | 2006年 12月 1日 | |||
| セレクション・ガイド | Voltage Supervisors (Reset ICs) Quick Reference Guide (Rev. H) | 2020年 2月 28日 | ||||
| e-Book（PDF） | Voltage Supervisor and Reset ICs: Tips, Tricks and Basics | 2019年 6月 28日 | ||||
| セレクション・ガイド | 電源 IC セレクション・ガイド 2018 (Rev. R 翻訳版) | 英語版 (Rev.R) | 2018年 9月 13日 | |||
| アプリケーション・ノート | Choosing an Appropriate Pull-up/Pull-down Resistor for Open Drain Outputs | 2011年 9月 19日 | ||||
| アプリケーション・ノート | Monitoring Five Different Voltage Rails Using the TPS3103 and TPS3306 | 2003年 8月 28日 |
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| パッケージ | ピン数 | CAD シンボル、フットプリント、および 3D モデル |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
| VSSOP (DGK) | 8 | Ultra Librarian |
購入と品質
- RoHS
- REACH
- デバイスのマーキング
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- MSL 定格 / ピーク リフロー
- MTBF/FIT 推定値
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