SN75C185
- Meets or Exceeds the Requirements of TIA/EIA-232-F and ITU Recommendation V.28
- Single Chip With Easy Interface Between UART and Serial-Port Connector
- Less Than 9-mW Power Consumption
- Wide Driver Supply Voltage...4.5 V to
13.2 V - Driver Output Slew Rate Limited to
30 V/us Max - Receiver Input Hysteresis...1100 mV Typ
- Push-Pull Receiver Outputs
- On-Chip Receiver 1-us Noise Filter
- Functionally Interchangeable With Texas Instruments SN75185
- Operates Up to 120 kbit/s Over a 3-Meter Cable (See Application Information for Conditions)
The SN75C185 is a low-power BiMOS device containing three independent drivers and five receivers that are used to interface data terminal equipment (DTE) with data circuit-terminating equipment (DCE). Typically, the SN75C185 replaces one SN75188 and two SN75189 devices. This device conforms to TIA/EIA-232-F. The drivers and receivers of the SN75C185 are similar to those of the SN75C188 and SN75C189A, respectively. The drivers have a controlled output slew rate that is limited to a maximum of 30 V/us, and the receivers have filters that reject input noise pulses that are shorter than 1 us. Both these features eliminate the need for external components.
The SN75C185 uses the low-power BiMOS technology. In most applications, the receivers contained in this device interface to single inputs of peripheral devices such as ACEs, UARTS, or microprocessors. By using sampling, such peripheral devices usually are insensitive to the transition times of the input signals. If this is not the case, or for other uses, it is recommended that the SN75C185 receiver outputs be buffered by single Schmitt input gates or single gates of the HCMOS, ALS, or 74F logic families.
The SN75C185 is characterized for operation from 0°C to 70°C.
기술 자료
| 유형 | 직함 | 날짜 | ||
|---|---|---|---|---|
| * | Data sheet | Low-Power Multiple Drivers And Receivers datasheet (Rev. F) | 2000/01/26 | |
| Application note | Interface Circuits for TIA/EIA-232-F (Rev. A) | 2002/09/19 |
설계 및 개발
추가 조건 또는 필수 리소스는 사용 가능한 경우 아래 제목을 클릭하여 세부 정보 페이지를 확인하세요.
PSPICE-FOR-TI — TI 설계 및 시뮬레이션 툴용 PSpice®
TI 설계 및 시뮬레이션 환경용 PSpice는 기본 제공 라이브러리를 이용해 복잡한 혼합 신호 설계를 시뮬레이션할 수 있습니다. 레이아웃 및 제작에 (...)
TINA-TI — SPICE 기반 아날로그 시뮬레이션 프로그램
| 패키지 | 핀 | CAD 기호, 풋프린트 및 3D 모델 |
|---|---|---|
| PDIP (N) | 20 | Ultra Librarian |
| SOIC (DW) | 20 | Ultra Librarian |
주문 및 품질
- RoHS
- REACH
- 디바이스 마킹
- 납 마감/볼 재질
- MSL 등급/피크 리플로우
- MTBF/FIT 예측
- 물질 성분
- 인증 요약
- 지속적인 신뢰성 모니터링
- 팹 위치
- 조립 위치
권장 제품에는 본 TI 제품과 관련된 매개 변수, 평가 모듈 또는 레퍼런스 디자인이 있을 수 있습니다.