Product details

Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -12 Input type TTL Output type TTL Features Very high speed (tpd 5-10ns) Technology family BCT Rating Military Operating temperature range (°C) -55 to 125
Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 8 IOL (max) (mA) 48 IOH (max) (mA) -12 Input type TTL Output type TTL Features Very high speed (tpd 5-10ns) Technology family BCT Rating Military Operating temperature range (°C) -55 to 125
CDIP (JT) 24 221.44 mm² 32 x 6.92 LCCC (FK) 28 130.6449 mm² 11.43 x 11.43
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • 3-State True Outputs
  • Back-to-Back Registers for Storage
  • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015
  • Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (JT, NT)
  • State-of-the-Art BiCMOS Design Significantly Reduces ICCZ
  • 3-State True Outputs
  • Back-to-Back Registers for Storage
  • ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015
  • Package Options Include Plastic Small-Outline Packages (DW), Ceramic Chip Carriers (FK) and Flatpacks (W), and Plastic and Ceramic 300-mil DIPs (JT, NT)

The 'BCT543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB\) input must be low in order to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs.

The SN54BCT543 is characterized for operation over the full military temperature range of \x9655°C to 125°C. The SN74BCT543 is characterized for operation from 0°C to 70°C.

The 'BCT543 octal transceiver contains two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable (LEAB\ or LEBA\) and output-enable (OEAB\ or OEBA\) inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable (CEAB\) input must be low in order to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using the CEBA\, LEBA\, and OEBA\ inputs.

The SN54BCT543 is characterized for operation over the full military temperature range of \x9655°C to 125°C. The SN74BCT543 is characterized for operation from 0°C to 70°C.

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Technical documentation

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Type Title Date
* Data sheet Octal Registered Transceivers With 3-State Outputs datasheet (Rev. C) 01 Apr 1994
* SMD SN54BCT543 SMD 5962-90870 21 Jun 2016
Application note Implications of Slow or Floating CMOS Inputs (Rev. E) 26 Jul 2021
Selection guide Logic Guide (Rev. AB) 12 Jun 2017
Application note Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 02 Dec 2015
User guide LOGIC Pocket Data Book (Rev. B) 16 Jan 2007
Application note Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 08 Jul 2004
Application note TI IBIS File Creation, Validation, and Distribution Processes 29 Aug 2002
Application note Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A) 01 Aug 1997
Application note Designing With Logic (Rev. C) 01 Jun 1997
Application note Input and Output Characteristics of Digital Integrated Circuits 01 Oct 1996
Application note Live Insertion 01 Oct 1996

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CDIP (JT) 24 Ultra Librarian
LCCC (FK) 28 Ultra Librarian

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