Home Logic & voltage translation Specialty logic ICs
Home
Logic & voltage translation
Specialty logic ICs

SN74ACT1073

ACTIVE

16-Bit Bus Termination Networks With Bus Hold Function

Order now
Data sheet

SN74ACT1073

ACTIVE
Data sheet Order now

Product details

Technology family ACT Bits (#) 16 Rating Catalog Operating temperature range (°C) -40 to 85
Technology family ACT Bits (#) 16 Rating Catalog Operating temperature range (°C) -40 to 85
  • Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
  • 4.5-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Reduces Undershoot and Overshoot Caused By Line Reflections
  • Repetitive Peak Forward Current ...IFRM = 100 mA
  • Inputs Are TTL-Voltage Compatible
  • Low Power Consumption (Like CMOS)
  • Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
  • Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
  • 4.5-V to 5.5-V VCC Operation
  • Inputs Accept Voltages to 5.5 V
  • Reduces Undershoot and Overshoot Caused By Line Reflections
  • Repetitive Peak Forward Current ...IFRM = 100 mA
  • Inputs Are TTL-Voltage Compatible
  • Low Power Consumption (Like CMOS)
  • Center-Pin VCC and GND Configuration Minimizes High-Speed Switching Noise
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.

This device is designed to terminate bus lines in CMOS systems. The integrated low-impedance diodes clamp the voltage of undershoots and overshoots caused by line reflections and ensure signal integrity. The device also contains a bus-hold function that consists of a CMOS-buffer stage with a high-resistance feedback path between its output and its input. The SN74ACT1073 prevents bus lines from floating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connected to the input terminals of the device. The feedback path on each internal buffer stage keeps a bus line tied to the bus holder at the last valid logic state generated by an active driver before the bus switches to the high-impedance state.
filter Find other Specialty logic ICs
Download

Technical documentation

star =Top documentation for this product selected by TI
No results found. Please clear your search and try again.
View all 1
Type Title Date
* Data sheet SN74ACT1073 datasheet (Rev. A) 01 Nov 2002

Ordering & quality

Information included:
  • RoHS
  • REACH
  • Device marking
  • Lead finish/Ball material
  • MSL rating/Peak reflow
  • MTBF/FIT estimates
  • Material content
  • Qualification summary
  • Ongoing reliability monitoring
Information included:
  • Fab location
  • Assembly location

Support & training

TI E2E™ forums with technical support from TI engineers

View all forum topics

Content is provided "as is" by TI and community contributors and does not constitute TI specifications. See terms of use.

If you have questions about quality, packaging or ordering TI products, see TI support. ​​​​​​​​​​​​​​

Videos