SN74AHC174

Name: SN74AHC174
Brand: TI
SKU: SN74AHC174
Price: 0.095 USD

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Hex D-Type Flip-Flops With Clear

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Data sheet

document-pdfAcrobat SN74AHC174 Hex D-Type Flip-Flops With Clear datasheet (Rev. H) PDF | HTML

SN74AHC174

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Data sheet

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Product details

Number of channels

6

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

110

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

40

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs

Operating temperature range (°C)

-40 to 85

Rating

Catalog

Number of channels

6

Technology family

AHC

Supply voltage (min) (V)

2

Supply voltage (max) (V)

5.5

Input type

Standard CMOS

Output type

Push-Pull

Clock frequency (max) (MHz)

110

IOL (max) (mA)

8

IOH (max) (mA)

-8

Supply current (max) (µA)

40

Features

Balanced outputs, High speed (tpd 10-50ns), Over-voltage tolerant inputs

Operating temperature range (°C)

-40 to 85

Rating

Catalog

PDIP (N)

16

181.42 mm² 19.3 x 9.4

SOIC (D)

16

59.4 mm² 9.9 x 6

SSOP (DB)

16

48.36 mm² 6.2 x 7.8

TSSOP (PW)

16

32 mm² 5 x 6.4

The ’AHC174 devices are positive-edge-triggered D-type flip-flops with a direct clear (CLR) input and are designed for 2V to 5.5V VCC operation.

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SN74HCS174

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Logic hex D-type flip-flops with reset Larger voltage range (2V to 6V)

Technical documentation

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	Type	Title		Date
*	Data sheet	SN74AHC174 Hex D-Type Flip-Flops With Clear datasheet (Rev. H)	PDF \| HTML	12 Jul 2024
	Application note	Power-Up Behavior of Clocked Devices (Rev. B)	PDF \| HTML	15 Dec 2022
	Application note	Implications of Slow or Floating CMOS Inputs (Rev. E)		26 Jul 2021
	Selection guide	Little Logic Guide 2018 (Rev. G)		06 Jul 2018
	Selection guide	Logic Guide (Rev. AB)		12 Jun 2017
	Application note	How to Select Little Logic (Rev. A)		26 Jul 2016
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)		02 Dec 2015
	User guide	LOGIC Pocket Data Book (Rev. B)		16 Jan 2007
	Product overview	Design Summary for WCSP Little Logic (Rev. B)		04 Nov 2004
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection		08 Jul 2004
	Application note	Selecting the Right Level Translation Solution (Rev. A)		22 Jun 2004
	Application note	Advanced High-Speed CMOS (AHC) Logic Family (Rev. C)		02 Dec 2002
	Application note	Texas Instruments Little Logic Application Report		01 Nov 2002
	Application note	TI IBIS File Creation, Validation, and Distribution Processes		29 Aug 2002
	Design guide	AHC/AHCT Designer's Guide February 2000 (Rev. D)		24 Feb 2000
	Application note	Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)		08 Sep 1999
	Product overview	Military Advanced High-Speed CMOS Logic (AHC/AHCT) (Rev. C)		01 Apr 1998
	Application note	Migration From 3.3-V To 2.5-V Power Supplies For Logic Devices		01 Dec 1997
	Application note	Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)		01 Aug 1997
	Application note	CMOS Power Consumption and CPD Calculation (Rev. B)		01 Jun 1997
	Application note	Live Insertion		01 Oct 1996

Design & development

For additional terms or required resources, click any title below to view the detail page where available.

Evaluation board

14-24-LOGIC-EVM — Logic product generic evaluation module for 14-pin to 24-pin D, DB, DGV, DW, DYY, NS and PW packages

The 14-24-LOGIC-EVM evaluation module (EVM) is designed to support any logic device that is in a 14-pin to 24-pin D, DW, DB, NS, PW, DYY or DGV package,

User guide: PDF | HTML