首頁 數據轉換器 類比轉數位轉換器 (ADC) 高速 ADC (≥10 MSPS)
首頁
數據轉換器
類比轉數位轉換器 (ADC)
高速 ADC (≥10 MSPS)

ADC3564

現行

具有 SLVDS 介面的單通道、14 位元、125 MSPS、高 SNR、低功率 ADC

立即訂購
產品規格表

ADC3564

現行
產品規格表 立即訂購

產品詳細資料

Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 137 Architecture SAR SNR (dB) 77.5 ENOB (Bits) 12.6 SFDR (dB) 85 Operating temperature range (°C) -40 to 105 Input buffer No
Sample rate (max) (Msps) 125 Resolution (Bits) 14 Number of input channels 1 Interface type Serial LVDS Analog input BW (MHz) 900 Features High Dynamic Range, High Performance, Low Power Rating Catalog Peak-to-peak input voltage range (V) 3.2 Power consumption (typ) (mW) 137 Architecture SAR SNR (dB) 77.5 ENOB (Bits) 12.6 SFDR (dB) 85 Operating temperature range (°C) -40 to 105 Input buffer No
WQFN (RSB) 40 25 mm² 5 x 5
  • 14-Bit 125 MSPS ADC
  • Noise floor: –156 dBFS/Hz
  • Ultra low power: 137 mW at 125 Msps
  • Latency: ≤ 2 clock cycles
  • Specified 14-bit, no missing codes
  • INL: ±1.5 LSB; DNL: ±0.5 LSB
  • Reference: external or internal
  • Input bandwidth: 1200 MHz (3 dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Spectral performance (fIN = 10 MHz):
    • SNR: 77.5 dBFS
    • SFDR: 80-dBc HD2, HD3
    • SFDR: 95-dBFS worst spur
  • Spectral performance (fIN = 70 MHz):
    • SNR: 75 dBFS
    • SFDR: 75-dBc HD2, HD3
    • SFDR: 90-dBFS worst spur
  • 14-Bit 125 MSPS ADC
  • Noise floor: –156 dBFS/Hz
  • Ultra low power: 137 mW at 125 Msps
  • Latency: ≤ 2 clock cycles
  • Specified 14-bit, no missing codes
  • INL: ±1.5 LSB; DNL: ±0.5 LSB
  • Reference: external or internal
  • Input bandwidth: 1200 MHz (3 dB)
  • Industrial temperature range: –40°C to +105°C
  • On-chip digital filter (optional)
    • Decimation by 2, 4, 8, 16, 32
    • 32-bit NCO
  • Serial LVDS digital interface (2-, 1- and 1/2-wire)
  • Small footprint: 40-WQFN (5 mm × 5 mm) package
  • Spectral performance (fIN = 10 MHz):
    • SNR: 77.5 dBFS
    • SFDR: 80-dBc HD2, HD3
    • SFDR: 95-dBFS worst spur
  • Spectral performance (fIN = 70 MHz):
    • SNR: 75 dBFS
    • SFDR: 75-dBc HD2, HD3
    • SFDR: 90-dBFS worst spur

The ADC3564 device is a low-noise, ultra-low power, 14-bit, 125-MSPS, high-speed ADC. Designed for low power consumption, the device delivers a noise spectral density of –156 dBFS/Hz combined with excellent linearity and dynamic range. The ADC3564 offers IF sampling support which makes the device suited for a wide range of applications. High-speed control loops benefit from the short latency of as little as one clock cycle. The ADC consumes only 137 mW at 125 MSPS, and the power consumption scales well with lower sampling rates.

The ADC3564 uses serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is a pin-to-pin compatible family with different speed grades and comes in a 40-pin VQFN package. The device supports the extended industrial temperature range from –40 to +105⁰C.

The ADC3564 device is a low-noise, ultra-low power, 14-bit, 125-MSPS, high-speed ADC. Designed for low power consumption, the device delivers a noise spectral density of –156 dBFS/Hz combined with excellent linearity and dynamic range. The ADC3564 offers IF sampling support which makes the device suited for a wide range of applications. High-speed control loops benefit from the short latency of as little as one clock cycle. The ADC consumes only 137 mW at 125 MSPS, and the power consumption scales well with lower sampling rates.

The ADC3564 uses serial LVDS (SLVDS) interface to output the data which minimizes the number of digital interconnects. The device supports two-lane, one-lane and half-lane options. The device is a pin-to-pin compatible family with different speed grades and comes in a 40-pin VQFN package. The device supports the extended industrial temperature range from –40 to +105⁰C.
filter 尋找其它 高速 ADC (≥10 MSPS)
下載 觀看有字幕稿的影片 影片

我們的 ADC3660 系列贏得 2021 年世界電子產品成就獎 (WEAA) 放大器/資料轉換類別的年度最佳產品。

技術文件

star =TI 所選的此產品重要文件
找不到結果。請清除您的搜尋條件，然後再試一次。
檢視所有 2
類型 標題 日期
* Data sheet ADC3564 14-Bit, 125-MSPS, Low-Noise, Ultra-Low Power ADC datasheet PDF | HTML 2017年 9月 20日
Analog Design Journal How to simplify AFE filtering via high‐speed ADCs with internal digital filters 2020年 1月 10日

設計與開發

如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
要求
封裝 針腳 CAD 符號、佔位空間與 3D 模型
WQFN (RSB) 40 Ultra Librarian
適用 TI 的評估品項標準條款與條件。

訂購與品質

內含資訊：
  • RoHS
  • REACH
  • 產品標記
  • 鉛塗層/球物料
  • MSL 等級/回焊峰值
  • MTBF/FIT 估算值
  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊：
  • 晶圓廠位置
  • 組裝地點

建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。

支援與培訓

內含 TI 工程師技術支援的 TI E2E™ 論壇

以英文檢視所有論壇主題

內容係由 TI 和社群貢獻者依「現狀」提供，且不構成 TI 規範。檢視使用條款。

若有關於品質、封裝或訂購 TI 產品的問題，請參閱 TI 支援。​​​​​​​​​​​​​​

影片