CD4001B

現行

4 通道、2 輸入、3-V 至 18-V NOR 閘

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產品規格表

document-pdfAcrobat CD4001B, CD4002B, CD4025B Types datasheet (Rev. C) (英文)

CD4001B

現行

產品規格表

立即訂購

產品詳細資料

Technology family

CD4000

Number of channels

4

Supply voltage (min) (V)

3

Supply voltage (max) (V)

18

Inputs per channel

2

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Output type

Push-Pull

Input type

Standard CMOS

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

8

Rating

Catalog

Operating temperature range (°C)

-55 to 125

Technology family

CD4000

Number of channels

4

Supply voltage (min) (V)

3

Supply voltage (max) (V)

18

Inputs per channel

2

IOL (max) (mA)

6.8

IOH (max) (mA)

-6.8

Output type

Push-Pull

Input type

Standard CMOS

Features

Standard speed (tpd > 50ns)

Data rate (max) (Mbps)

8

Rating

Catalog

Operating temperature range (°C)

-55 to 125

PDIP (N)

14

181.42 mm² 19.3 x 9.4

SOIC (D)

14

51.9 mm² 8.65 x 6

SOP (NS)

14

79.56 mm² 10.2 x 7.8

TSSOP (PW)

14

32 mm² 5 x 6.4

Propagation delay time = 60 ns (typ.) at C_L = 50 pF, V_DD = 10 V
Buffered inputs and outputs
Standardized symmetrical output characteristics
100% tested for maximum quiescent current at 20 V
5-V, 10-V, and 15-V parametric ratings
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
     1 V at V_DD = 5 V
     2 V at V_DD = 10 V
  2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

Propagation delay time = 60 ns (typ.) at C_L = 50 pF, V_DD = 10 V
Buffered inputs and outputs
Standardized symmetrical output characteristics
100% tested for maximum quiescent current at 20 V
5-V, 10-V, and 15-V parametric ratings
Maximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
Noise margin (over full package temperature range):
     1 V at V_DD = 5 V
     2 V at V_DD = 10 V
  2.5 V at V_DD = 15 V
Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"

Data sheet acquired from Harris Semiconductor

CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

CD4001B, CD4002B, and CD4025B NOR gates provide the system designer with direct implementation of the NOR function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4001B, CD4002B, and CD4025B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PW and PWR suffixes).

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SN74LVC02A

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4 通道、2 輸入、1.5-V 至 3.6-V NOR 閘 Smaller voltage range (1.65V to 5.5V), shorter average propagation delay (5.5ns), higher average drive strength (24mA)

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	類型	標題	日期
*	Data sheet	CD4001B, CD4002B, CD4025B Types datasheet (Rev. C)	2003年 8月 21日
	Selection guide	Logic Guide (Rev. AB)	2017年 6月 12日
	Application note	Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)	2015年 12月 2日
	User guide	LOGIC Pocket Data Book (Rev. B)	2007年 1月 16日
	Application note	Semiconductor Packing Material Electrostatic Discharge (ESD) Protection	2004年 7月 8日
	User guide	Signal Switch Data Book (Rev. A)	2003年 11月 14日
	Application note	Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics	2001年 12月 3日

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模擬型號

CD4001B PSPICE Model (Rev. A)

SCHM025A.ZIP (7 KB) - PSpice Model

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封裝	針腳	CAD 符號、佔位空間與 3D 模型
PDIP (N)	14	Ultra Librarian
SOIC (D)	14	Ultra Librarian
SOP (NS)	14	Ultra Librarian
TSSOP (PW)	14	Ultra Librarian

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CD4001B

4 通道、2 輸入、3-V 至 18-V NOR 閘

CD4001B

產品詳細資料

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CD4001B PSPICE Model (Rev. A)

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