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CD54ACT86

現行

具有 TTL 相容 CMOS 輸入的軍用 4 通道、2 輸入、4.5-V 至 5.5-V XOR (exclusive OR) 閘

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產品規格表

CD54ACT86

現行
產品規格表 立即訂購

產品詳細資料

Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type TTL-Compatible CMOS IOH (max) (mA) -24 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 90 Rating Military Operating temperature range (°C) -55 to 125
Technology family ACT Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Number of channels 4 Inputs per channel 2 IOL (max) (mA) 24 Input type TTL-Compatible CMOS IOH (max) (mA) -24 Output type Push-Pull Features Over-voltage tolerant inputs, Very high speed (tpd 5-10ns) Data rate (max) (Mbps) 90 Rating Military Operating temperature range (°C) -55 to 125
CDIP (J) 14 130.4652 mm² 19.56 x 6.67
  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015
  • Inputs Are TTL-Voltage Compatible
  • Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumption
  • Balanced Propagation Delays
  • ±24-mA Output Drive Current
    • Fanout to 15 F Devices
  • SCR-Latchup-Resistant CMOS Process and Circuit Design
  • Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015

The ’ACT86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function Y = A B or Y = A\B + AB\ in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.

The ’ACT86 devices are quadruple 2-input exclusive-OR gates. These devices perform the Boolean function Y = A B or Y = A\B + AB\ in positive logic.

A common application is as a true/complement element. If one of the inputs is low, the other input is reproduced in true form at the output. If one of the inputs is high, the signal on the other input is reproduced inverted at the output.
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類型 標題 日期
* Data sheet CD54ACT86, CD74ACT86 datasheet 2003年 1月 17日

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  • MTBF/FIT 估算值
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