CY54FCT480T
- Function, Pinout, and Drive Compatible With FCT and F Logic
- Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
- Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
- Ioff Supports Partial-Power-Down Mode Operation
- Matched Rise and Fall Times
- Fully Compatible With TTL Input and Output Logic Levels
- Two 8-Bit Parity Generators/Checkers
- Open-Drain Active-Low Parity-Error Output
- Expandable for Larger Word Widths
- ESD Protection Exceeds JESD 22
- 2000-V Human-Body Model (A114-A)
- 200-V Machine Model (A115-A)
- 1000-V Charged-Device Model (C101)
- CY54FCT480T
- 32-mA Output Sink Current
- 12-mA Output Source Current
- CY74FCT480T
- 64-mA Output Sink Current
- 32-mA Output Source Current
The \x92FCT480T devices are high-speed, dual, 8-bit parity generators/checkers. Each parity generator/checker accepts eight data bits and one parity bit as inputs, and generates a sum and parity-error (ERROR\) output. These devices can be used in odd-parity systems. ERROR\ is an open-drain output designed for easy expansion of the word width by a wired-OR connection of several \x92FCT480T devices. Because no additional logic is needed, the parity-generation or parity-checking times remain the same as for an individual \x92FCT480T device.
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | Dual 8-Bit Parity Generators/Checkers datasheet (Rev. B) | 2001年 10月 24日 | |
| Selection guide | Logic Guide (Rev. AB) | 2017年 6月 12日 | ||
| Application note | Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) | 2015年 12月 2日 | ||
| User guide | LOGIC Pocket Data Book (Rev. B) | 2007年 1月 16日 | ||
| Application note | Semiconductor Packing Material Electrostatic Discharge (ESD) Protection | 2004年 7月 8日 | ||
| Application note | Selecting the Right Level Translation Solution (Rev. A) | 2004年 6月 22日 | ||
| User guide | CYFCT Parameter Measurement Information | 2001年 4月 2日 | ||
| Selection guide | Advanced Bus Interface Logic Selection Guide | 2001年 1月 9日 |
設計與開發
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| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| LCCC (FK) | 28 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點