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DAC7822 現行 12 位元雙通道平行輸入倍頻數位轉類比轉換器 Smaller 40-pin, 6mm × 6mm QFN package

產品詳細資料

Resolution (Bits) 12 Number of DAC channels 2 Interface type Parallel Output type Unbuffered Current INL (max) (±LSB) 0.5 Settling time (µs) 0.8 Reference type Ext Architecture Multiplying DAC Rating Catalog Sample/update rate (Msps) 1.25 Power consumption (typ) (mW) 1 Operating temperature range (°C) -40 to 85
Resolution (Bits) 12 Number of DAC channels 2 Interface type Parallel Output type Unbuffered Current INL (max) (±LSB) 0.5 Settling time (µs) 0.8 Reference type Ext Architecture Multiplying DAC Rating Catalog Sample/update rate (Msps) 1.25 Power consumption (typ) (mW) 1 Operating temperature range (°C) -40 to 85
SOIC (DW) 24 159.65 mm² 15.5 x 10.3
  • TWO DACs IN A 0.3" WIDE PACKAGE
  • SINGLE +5V SUPPLY
  • HIGH SPEED DIGITAL INTERFACE:
      Serial—DAC7800
      8 + 4-Bit Parallel—DAC7801
      12-Bit Parallel—DAC7802
  • MONOTONIC OVER TEMPERATURE
  • LOW CROSSTALK: –94dB min
  • FULLY SPECIFIED OVER –40°C TO +85°C
  • APPLICATIONS
    • PROCESS CONTROL OUTPUTS
    • ATE PIN ELECTRONICS LEVEL SETTING
    • PROGRAMMABLE FILTERS
    • PROGRAMMABLE GAIN CIRCUITS
    • AUTO-CALIBRATION CIRCUITS

All trademarks are the property of their respective owners.

  • TWO DACs IN A 0.3" WIDE PACKAGE
  • SINGLE +5V SUPPLY
  • HIGH SPEED DIGITAL INTERFACE:
      Serial—DAC7800
      8 + 4-Bit Parallel—DAC7801
      12-Bit Parallel—DAC7802
  • MONOTONIC OVER TEMPERATURE
  • LOW CROSSTALK: –94dB min
  • FULLY SPECIFIED OVER –40°C TO +85°C
  • APPLICATIONS
    • PROCESS CONTROL OUTPUTS
    • ATE PIN ELECTRONICS LEVEL SETTING
    • PROGRAMMABLE FILTERS
    • PROGRAMMABLE GAIN CIRCUITS
    • AUTO-CALIBRATION CIRCUITS

All trademarks are the property of their respective owners.

The DAC7800,DAC7801 and DAC7802 are members of a new family of monolithic dual 12-bit CMOS multiplying Digital-to-Analog Converters (DACs). The digital interface speed and the AC multiplying performance are achieved by using an advanced CMOS process optimized for data conversion circuits. High stability on-chip resistors provide true 12-bit integral and differential linearity over the wide industrial temperature range of –40°C to +85°C.

The DAC7800 features a serial interface capable of clocking-in data at a rate of at least 10MHz. Serial data is clocked (edge triggered) MSB first into a 24-bit shift register and then latched into each DAC separately or simultaneously as required by the application. An asynchronous CLEAR control is provided for power-on reset or system calibration functions. It is packaged in a 16-pin 0.3" wide plastic DIP.

The DAC7801 has a 2-byte (8 + 4) double-buffered interface. Data is first loaded (level transferred) into the input registers in two steps for each DAC. Then both DACs are updated simultaneously. The DAC7801 features an asynchronous CLEAR control. The DAC7801 is packaged in a 24-pin 0.3" wide plastic DIP. The DAC7802 has a single-buffered 12-bit data word interface. Parallel data is loaded (edge triggered) into the single DAC register for each DAC. The DAC7802 is packaged in a 24-pin 0.3" wide plastic DIP.

The DAC7800,DAC7801 and DAC7802 are members of a new family of monolithic dual 12-bit CMOS multiplying Digital-to-Analog Converters (DACs). The digital interface speed and the AC multiplying performance are achieved by using an advanced CMOS process optimized for data conversion circuits. High stability on-chip resistors provide true 12-bit integral and differential linearity over the wide industrial temperature range of –40°C to +85°C.

The DAC7800 features a serial interface capable of clocking-in data at a rate of at least 10MHz. Serial data is clocked (edge triggered) MSB first into a 24-bit shift register and then latched into each DAC separately or simultaneously as required by the application. An asynchronous CLEAR control is provided for power-on reset or system calibration functions. It is packaged in a 16-pin 0.3" wide plastic DIP.

The DAC7801 has a 2-byte (8 + 4) double-buffered interface. Data is first loaded (level transferred) into the input registers in two steps for each DAC. Then both DACs are updated simultaneously. The DAC7801 features an asynchronous CLEAR control. The DAC7801 is packaged in a 24-pin 0.3" wide plastic DIP. The DAC7802 has a single-buffered 12-bit data word interface. Parallel data is loaded (edge triggered) into the single DAC register for each DAC. The DAC7802 is packaged in a 24-pin 0.3" wide plastic DIP.

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類型 標題 日期
* Data sheet DAC7800, 7801, 7802: Dual Monolithic CMOS 12-Bit Multiplying D/A Converter datasheet (Rev. B) 2004年 2月 17日

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  • MSL 等級/回焊峰值
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  • 材料內容
  • 認證摘要
  • 進行中持續性的可靠性監測
內含資訊:
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