產品詳細資料

Resolution (Bits) 12 Number of DAC channels 1 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 170 SFDR (dB) 77 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
Resolution (Bits) 12 Number of DAC channels 1 Interface type Parallel CMOS Sample/update rate (Msps) 200 Features Low Power Rating Catalog Interpolation 1x Power consumption (typ) (mW) 170 SFDR (dB) 77 Architecture Current Source Operating temperature range (°C) -40 to 85 Reference type Ext, Int
SOIC (DW) 28 184.37 mm² 17.9 x 10.3 TSSOP (PW) 28 62.08 mm² 9.7 x 6.4
  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 67dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS:
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION:
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

  • SINGLE +5V OR +3V OPERATION
  • HIGH SFDR: 5MHz Output at 100MSPS: 67dBc
  • LOW GLITCH: 3pV-s
  • LOW POWER: 170mW at +5V
  • INTERNAL REFERENCE:
         Optional Ext. Reference
         Adjustable Full-Scale Range
         Multiplying Option
  • APPLICATIONS
    • COMMUNICATION TRANSMIT CHANNELS:
           WLL, Cellular Base Station
           Digital Microwave Links
           Cable Modems
    • WAVEFORM GENERATION:
           Direct Digital Synthesis (DDS)
           Arbitrary Waveform Generation (ARB)
    • MEDICAL/ULTRASOUND
    • HIGH-SPEED INSTRUMENTATION AND CONTROL
    • VIDEO, DIGITAL TV

The DAC902 is a high-speed, Digital-to-Analog Converter (DAC) offering a 12-bit resolution option within the SpeedPlus Family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC900, and DAC904 provide a component selection option to an 8-, 10-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance, and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC902 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC902 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC902 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC902, a power-down mode results in only 45mW of standby power.

The DAC902 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC902.

The reference structure of the DAC902 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC902 is available in the SO-28 and TSSOP-28 packages.

The DAC902 is a high-speed, Digital-to-Analog Converter (DAC) offering a 12-bit resolution option within the SpeedPlus Family of high-performance converters. Featuring pin compatibility among family members, the DAC908, DAC900, and DAC904 provide a component selection option to an 8-, 10-, and 14-bit resolution, respectively. All models within this family of DACs support update rates in excess of 165MSPS with excellent dynamic performance, and are especially suited to fulfill the demands of a variety of applications.

The advanced segmentation architecture of the DAC902 is optimized to provide a high Spurious-Free Dynamic Range (SFDR) for single-tone, as well as for multi-tone signals—essential when used for the transmit signal path of communication systems.

The DAC902 has a high impedance (200k) current output with a nominal range of 20mA and an output compliance of up to 1.25V. The differential outputs allow for both a differential or single-ended analog signal interface. The close matching of the current outputs ensures superior dynamic performance in the differential configuration, which can be implemented with a transformer.

Utilizing a small geometry CMOS process, the monolithic DAC902 can be operated on a wide, single-supply range of +2.7V to +5.5V. Its low power consumption allows for use in portable and battery-operated systems. Further optimization can be realized by lowering the output current with the adjustable full-scale option.

For noncontinuous operation of the DAC902, a power-down mode results in only 45mW of standby power.

The DAC902 comes with an integrated 1.24V bandgap reference and edge-triggered input latches, offering a complete converter solution. Both +3V and +5V CMOS logic families can be interfaced to the DAC902.

The reference structure of the DAC902 allows for additional flexibility by utilizing the on-chip reference, or applying an external reference. The full-scale output current can be adjusted over a span of 2mA to 20mA, with one external resistor, while maintaining the specified dynamic performance.

The DAC902 is available in the SO-28 and TSSOP-28 packages.

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類型 標題 日期
* Data sheet DAC902 SpeedPlus 12-Bit 165-MSPS Digital-to-Analog Converter datasheet (Rev. B) 2002年 5月 29日
Analog Design Journal Q4 2009 Issue Analog Applications Journal 2018年 9月 24日
EVM User's guide DAC90x Evaluation Module User's Guide 2017年 8月 8日
Application note Wideband Complementary Current Output DAC Single-Ended Interface (Rev. A) 2015年 5月 8日
Application note High Speed, Digital-to-Analog Converters Basics (Rev. A) 2012年 10月 23日
Analog Design Journal Interfacing op amps to high-speed DACs, Part 2: Current-sourcing DACs 2009年 10月 4日
User guide DEM-DAC90x: Evaluation Fixture for the DAC900, DAC902, DAC904, DAC908 2000年 9月 27日

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開發板

DAC902EVM — DAC902 12 位元 165 MSPS 數位轉類比轉換器 (DAC) 評估模組

The DAC902 evaluation module (EVM) is designed to evaluate the 12-bit, high-speed,
CMOS-interface DAC902. The EVM provides simple and minimal external components to minimize system cost and power consumption.
使用指南: PDF
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模擬型號

DAC902E IBIS Model for 3.3V

SLWC055.ZIP (6 KB) - IBIS Model
模擬型號

DAC902E IBIS Model for 5V

SLWC056.ZIP (5 KB) - IBIS Model
計算工具

MATCHGAIN-CALC — 寬頻補償電流輸出 DAC 至 SE 介面:改善增益和合規電壓擺幅的匹配

NOTE: Calculator software is available when downloading the application note.
  • Click on "abstract" to view abstract of document.
  • Open the ZIP file to extract the calculator tool.
  • Open the PDF file to view the application note.

High-speed digital-to-analog converters (DACs) most often use a (...)

模擬工具

PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具

PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
封裝 針腳 CAD 符號、佔位空間與 3D 模型
SOIC (DW) 28 Ultra Librarian
TSSOP (PW) 28 Ultra Librarian

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