DDS39RFS12
- 16-bit, 12 to 24GSPS, multi-Nyquist DAC cores
- Maximum input data rate:
- 16-bit, single channel complex I/Q: 775MSPS
- 16-bit, dual channel complex I/Q: 388MSPS
- Output bandwidth (-3dB): 12GHz
- Performance at fOUT = 2.997GHz, DES2XL mode, DEM and Dither off
- Noise floor (small signal): -154dBFS/Hz
- SFDR (-0.1dBFS): 68dBc
- IMD3 (-7dBFS each tone): -74dBc
- Additive phase noise, 10kHz offset: -138dBc/Hz
- Four Integrated digital up-converters (DUC)
- Interpolation: 4x, 6x, 8x, 12x ... 256x
- Complex baseband DUC for I/Q output
- Complex to real up conversion for dual channel direct RF sampling
- 64-bit frequency resolution NCOs
- Fast reconfiguration interface for fast frequency hopping
- 4-bit data with 200MHz clock
- 60ns reconfiguration (32-bit frequency)
- Any frequency hopping with phase coherence
- JESD204C Interface
- Up to 2 Lanes at up to 12.8Gbps each
- Class C-S, subclass-1 compatible
- Internal AC coupling capacitors
- SYSREF Windowing for automatic SYSREF timing calibration
DDS39RF12 and ’RFS12 are a family of dual and single channel direct digital synthesizers with 16-bit resolution digital-to-analog converters (DAC). The high sampling rate, output frequency range, 64-bit NCO frequency resolution and any frequency hopping with phase coherence makes the device capable of arbitrary waveform generation (AWG) and direct digital synthesis (DDS).
The devices can also be used as interpolating DACs for narrowband direct RF sampling or complex baseband signal generation. The maximum input data rate is 775MSPS for a single channel or 388MSPS for two channels. The devices can generate signals of up to 620MHz signal bandwidth (16-bit input resolution) at carrier frequencies exceeding 10GHz enabling direct sampling through C-band and into X-band.
A JESD204B and JESD204C compatible serial interface has 2 receiver pairs capable of up to 12.8Gbps each. The interface is JESD204B and JESD204C subclass-1 compliant for deterministic latency and multi-device synchronization through the use of SYSREF.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DDS39RF12 and DDS39RFS12, 12GSPS to 24GSPS, Dual and Single Channel, Multi-Nyquist Direct Digital Synthesizer (DDS) datasheet | PDF | HTML | 2024年 9月 26日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| FCBGA (ACK) | 256 | Ultra Librarian |
| FCBGA (ACL) | 256 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點