DS100MB201
- Up to 10.3125 Gbps
- Dual Lane 2:1 Mux, 1.2 Switch or Fanout
- Adjustable Transmit Differential Output Voltage (VOD)
- <0.3 UI of Residual DJ at 10.3125 Gbps with 10” FR4 trace
- Adjustable Electrical IDLE Detect Threshold
- Signal Conditioning Programmable through SMBus I/F
- Single 2.5V Supply Operation
- >6 kV HBM ESD Rating
- 3.3V Tolerant SMBus Interface
- High Speed Signal flow–thru Pinout
- Package: 54-pin WQFN (10 mm x 5.5 mm)
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The DS100MB201 is a dual lane 2:1 multiplexer and 1:2 switch or fan-out buffer with signal conditioning suitable for 10GE, Fibre Channel, Infiniband, SATA/SAS and other high-speed bus applications up to 10.31215 Gbps. The device performs receive equalization allowing maximum flexibility of physical placement within a system. The receiver's continuous time linear equalizer (CTLE) provides a boost to compensate for 10” of 4 mil FR4 stripline at 10.3125 Gbps. The DS100MB201 is capable of opening an input eye that is completely closed due to inter-symbol interference (ISI) induced by the interconnect medium. The transmitter features a programmable amplitude voltage levels to be selected from 600 mVp-p to 800 mVp-p. The signal conditioning settings are programmable with register control.
With a typical power consumption of 100 mW/channel at 10.3125 Gbps, and SMBus register control to turn-off unused lanes, the DS100MB201 is part of TI's PowerWise family of energy efficient devices.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS100MB201 Dual Lane 2:1/1:2 Mux/Buffer with Equalization datasheet (Rev. A) | 2013年 4月 12日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NJY) | 54 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。