DS90C402
- Ultra Low Power Dissipation
- Operates above 155.5 Mbps
- Standard TIA/EIA-644
- 8 Lead SOIC Package saves PCB space
- VCM ±1V center around 1.2V
- ±100 mV Receiver Sensitivity
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The DS90C402 is a dual receiver device optimized for high data rate and low power applications. This device along with the DS90C401 provides a pair chip solution for a dual high speed point-to-point interface. The device is in a PCB space saving 8 lead small outline package. The receiver offers ±100 mV threshold sensitivity, in addition to common-mode noise protection.
技術文件
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檢視所有 4 | 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver datasheet (Rev. C) | 2013年 4月 22日 | |
| Application note | Capacitive Touch Design Flow for MSP430™ MCUs With CapTIvate™ Technology (Rev. B) | PDF | HTML | 2019年 8月 14日 | |
| Application brief | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||
| Application note | An Overview of LVDS Technology | 1998年 10月 5日 |
設計與開發
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模擬工具
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
PSpice® for TI is a design and simulation environment that helps evaluate functionality of analog circuits. This full-featured, design and simulation suite uses an analog analysis engine from Cadence®. Available at no cost, PSpice for TI includes one of the largest model libraries in the (...)
模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
TINA-TI provides all the conventional DC, transient and frequency domain analysis of SPICE and much more. TINA has extensive post-processing capability that allows you to format results the way you want them. Virtual instruments allow you to select input waveforms and probe circuit nodes voltages (...)
使用指南: PDF
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| SOIC (D) | 8 | Ultra Librarian |
訂購與品質
內含資訊：
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
內含資訊：
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。