DS92LV2412
- 24-Bit Data, 3–Bit Control, 5 to 50 MHz Clock
- Application Payloads up to 1.2 Gbps
- AC Coupled Interconnects: STP up to 10 m or
Coax 20+m - 1.8 V or 3.3 V Compatible LVCMOS I/O Interface
- Integrated Terminations on Ser and Des
- AT-SPEED BIST Mode and Reporting Pin
- Configurable by Pins or I2C Compatible Serial
Control Bus - Power Down Mode Minimizes Power Dissipation
- >8 kV HBM ESD Rating
- SERIALIZER — DS92LV2411
- Supports Spread Spectrum Clocking (SSC) on
Inputs - Data Scrambler for Reduced EMI
- DC-Balance Encoder for AC Coupling
- Selectable Output VOD and Adjustable
De-emphasis
- Supports Spread Spectrum Clocking (SSC) on
- DESERIALIZER — DS92LV2412
- Random Data Lock; no Reference Clock
Required - Adjustable Input Receiver Equalization
- LOCK (Real Time Link Status) Reporting Pin
- Selectable Spread Spectrum Clock Generation
(SSCG) and Output Slew Rate Control (OS) to
Reduce EMI
- Random Data Lock; no Reference Clock
The DS92LV2411 (Serializer) and DS92LV2412 (Deserializer) chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size and interconnect cost for transferring a 24-bit, or less, bus over FR-4 printed circuit board backplanes, differential or coax cables.
In addition to the 24-bit data bus interface, the DS92LV2411/12 also features a 3-bit control bus for slow speed signals. This allows implementing video and display applications with up to 24–bits per pixel (RGB888).
Programmable transmit de-emphasis, receive equalization, on-chip scrambling and DC balancing enables long distance transmission over lossy cables and backplanes. The DS92LV2412 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy “plug-and-go” or “hot plug” operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.
The DS92LV2411/12 chipset is programmable though an I2C interface as well as through Pins. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.
The DS92LV2411 is offered in a 48-Pin WQFN and the DS92LV2412 is offered in a 60-Pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to +85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS92LV241x 5 to 50 MHz 24-Bit Channel Link II Serializer And Deserializer datasheet (Rev. E) | PDF | HTML | 2015年 2月 9日 |
| Application note | DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) | 2013年 4月 29日 | ||
| User guide | LV24EVK01 Channel Link II Ser/Des Evaluation Kit User Guide | 2012年 1月 25日 | ||
| Design guide | Channel Link II Design Guide | 2011年 1月 21日 |
設計與開發
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PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NKB) | 60 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。