DS92LV2422
- 24-Bit Data, 3-Bit Control, 10- to 75-MHz Clock
- AC-Coupled STP Interconnect Cable up to 10 m
- Integrated Terminations on Serializer and
Deserializer - At-Speed Link BIST Mode and Reporting Pin
- Optional I2C-Compatible Serial Control Bus
- Power-Down Mode Minimizes Power Dissipation
- 1.8-V or 3.3-V Compatible LVCMOS I/O Interface
- –40° to 85°C Temperature Range
- >8-kV HBM
- Serializer (DS92LV2421)
- Data Scrambler for Reduced EMI
- DC-Balance Encoder for AC Coupling
- Selectable Output VOD and Adjustable
De-emphasis
- Deserializer (DS92LV2422)
- Fast Random Data Lock; No Reference Clock
Required - Adjustable Input Receiver Equalization
- LOCK (Real-Time Link Status) Reporting Pin
- EMI Minimization on Output Parallel Bus
(SSCG) - Output Slew Control (OS)
- Fast Random Data Lock; No Reference Clock
The DS92LV242x chipset translates a parallel 24–bit LVCMOS data interface into a single high-speed CML serial interface with embedded clock information. This single serial stream eliminates skew issues between clock and data, reduces connector size, and reduces interconnect cost for transferring a 24-bit or less bus over FR-4 printed-circuit board backplanes and balanced cables. In addition, the DS92LV242x chipset also features a 3-bit control bus for slow speed signals. This allows for video and display applications with up to 24 bits per pixel (RGB).
Programmable transmit de-emphasis, receive equalization, on-chip scrambling, and DC balancing enables longer distance transmission over lossy cables and backplanes. The DS92LV2422 automatically locks to incoming data without an external reference clock or special sync patterns, providing easy plug-and-go operation. EMI is minimized by the use of low voltage differential signaling, receiver drive strength control, and spread spectrum clocking capability.
The DS92LV242x chipset is programmable though an I2C interface as well as through pins. A built-in, at-speed BIST feature validates link integrity and may be used for system diagnostics. The DS92LV2421 is offered in a 48-pin WQFN, and the DS92LV2422 is offered in a 60-pin WQFN package. Both devices operate over the full industrial temperature range of –40°C to 85°C.
技術文件
| 類型 | 標題 | 日期 | ||
|---|---|---|---|---|
| * | Data sheet | DS92LV242x 10-MHz to 75-MHz, 24-Bit Channel Link II Serializer And Deserializer datasheet (Rev. C) | PDF | HTML | 2016年 5月 31日 |
| Application note | High-Speed Layout Guidelines for Reducing EMI for LVDS SerDes Designs | 2018年 11月 9日 | ||
| Application note | How to Design LVDS SerDes in Industrial Systems | 2018年 7月 16日 | ||
| Technical article | Applications of Low Voltage Differential Signaling (LVDS) in Multifunction and Ind | PDF | HTML | 2017年 8月 24日 | |
| Application note | DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E) | 2013年 4月 29日 | ||
| User guide | LV24EVK01 Channel Link II Ser/Des Evaluation Kit User Guide | 2012年 1月 25日 | ||
| Design guide | Channel Link II Design Guide | 2011年 1月 21日 | ||
| Application note | Go the Distance: Industrial SerDes with Embedded Clock and Control | 2010年 10月 20日 |
設計與開發
如需其他條款或必要資源，請按一下下方的任何標題以檢視詳細頁面 (如有)。
LV24EVK01 — LV24EVK01 評估套件
The LV24EVK01 is an evaluation kit designed to demonstrate performance and capabilities of the DS92LV2421 and DS92LV2422 Channel Link II Serializer/Deserializer chipset.
The DS92LV2421 serializer board accepts LVCMOS input signals and provides a single serialized Channel Link II CML data pair as an (...)
PSPICE-FOR-TI — PSpice® for TI 設計與模擬工具
TINA-TI — 基於 SPICE 的類比模擬程式
| 封裝 | 針腳 | CAD 符號、佔位空間與 3D 模型 |
|---|---|---|
| WQFN (NKB) | 60 | Ultra Librarian |
訂購與品質
- RoHS
- REACH
- 產品標記
- 鉛塗層/球物料
- MSL 等級/回焊峰值
- MTBF/FIT 估算值
- 材料內容
- 認證摘要
- 進行中持續性的可靠性監測
- 晶圓廠位置
- 組裝地點
建議產品可能具有與此 TI 產品相關的參數、評估模組或參考設計。